Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Corporation

Tetsuya Takami

Kazuyoshi Kojima

Yukihiko Wada

Koichi A Ono

Akihiko Furukawa

Hiroshi Sugimoto

Yoichiro Tarui

Masayuki Imaizumi

Akihiro Suzuki

Toshiyuki Oishi

Hitoshi Wakata

Kenyu Haruta

Kenichi Kuroda

Ken-ichi Ohtsuka

Yoshio Saito

Tadaharu Minato

Tomohiro Sasagawa

Tsuyoshi Horikawa

Takaaki Kawahara

Taisuke Furukawa

Naohiko Fujino

Noboru Mikami

Mutsumi Tsuda

Hideki Yabe

Junji Tanimura

Kenichi Ootsuka

Kazuo Kuramoto

Kouji Kise

Yasuji Matsui

Keisuke Nanba

Akimasa Yuki

Tetsuo Makita

Hiroshi Kuroki

Tetsuo Ogama

In a MOSFET using SiC a p-type channel is formed by epitaxial growth, so that the depletion layer produced in the p-type region right under the channel is reduced, even when the device is formed in a self-aligned manner. Thus, a high breakdown voltage is obtained. Also, since the device is formed in a self-aligned manner, the device size can be reduced so that an increased number of devices can be fabricated in a certain area and the on-state resistance can be reduced.

Power semiconductor device having raised channel and manufacturing method thereof

A semiconductor device and its manufacturing method are provided in which the trade-off relation between channel resistance and JFET resistance, an obstacle to device miniaturization, is improved and the same mask is used to form a source region and a base region by ion implantation. In a vertical MOSFET that uses SiC, a source region and a base region are formed by ion implantation using the same tapered mask to give the base region a tapered shape. The taper angle of the tapered mask is set to 30&#xb0; to 60&#xb0; when the material of the tapered mask has the same range as SiC in ion implantation, and to 20&#xb0; to 45&#xb0; when the material of the tapered mask is SiO.

Method of manufacturing a SiC vertical MOSFET

A semiconductor device and its manufacturing method in which the trade-off relationship between channel resistance and JFET resistance is improved. The same mask is used to form a source region and a base region by ion implantation. In a vertical MOSFET including SiC, a source region and a base region are formed by ion implantation using the same tapered mask to give the base region a tapered shape. The taper angle of the tapered mask is set to 30&#xb0; to 60&#xb0; when the material of the tapered mask has the same range as SiC in ion implantation, and to 20&#xb0; to 45&#xb0; when the material of the tapered mask is SiO.

Method of manufacture of a silicon carbide MOSFET including a masking with a tapered shape and implanting ions at an angle

A thin film forming apparatus using laser includes a chamber (1), a target (5) placed therein, a laser light source (10) for emitting laser beam to target (5), and a substrate holder (3). When target (5) is irradiated with laser beam (16), a plume (15) is generated, and materials included in plume (15) are deposited on the surface of a substrate (2) held by substrate holder (3). The laser beam emitted from laser light source (10) has its cross section shaped to a desired shape when passed through a shielding plate (4804), for example, so that the surface of the target (5) is irradiated with the beam having uniform light intensity distribution. Therefore, a plume (15) having uniform density distribution of active particles is generated, and therefore a thin film of high quality can be formed over a wide area with uniform film quality, without damaging the substrate.

Thin film forming apparatus using laser

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Tokyo, Japan

Tetsuya Takami