Canon Kabushiki Kaisha

Tetsuya Shimizu

Yoshiki Ishii

Makoto Shimokoriyama

Akihiro Shikakura

Motokazu Kashida

Shinichi Yamashita

Yasuyuki Tanaka

Akio Fujii

Katsumi Karasawa

Yukinori Yamamoto

Toshihiko Suzuki

Katsuji Yoshimura

Mitsuo Niida

Shinji Ohnishi

Hidenori Hoshi

Yoshitaka Takeuchi

Nobuhiro Hoshi

Masahiko Enari

Mitsugu Tanaka

Akio Aoki

Tomohiko Sasatani

Akiyoshi Hamanaka

Akihiro Skikakura

An image processing apparatus includes a reception unit, a decoding unit, a sub frame generating unit and an image signal generating unit. The reception unit receives at least three encoded image data via a serial bus. The decoding unit decodes one of the received encoded image data to generate a main frame. The sub frame generating unit extracts low frequency component from each one of the other received encoded image data, and generates sub frames from the extracted low frequency components. The image signal generating unit combines the main frame and the sub frames, and generates an image signal including the main frame combined with the sub frames.

Image processing apparatus and image processing method

An image pickup apparatus comprising: an image pickup unit for outputting an image signal having a first number of pixels which is greater than a predetermined number of pixels; a converting unit for converting the image signal having the first number of pixels, outputted from the image pickup unit into an image signal having the predetermined number of pixels; a first memory having storage capacity corresponding to the predetermined number of pixels, for storing the image signal having the predetermined number of pixels, outputted from the converting unit; a second memory having a storage capacity corresponding to the first number of pixels, for storing the image signal having the first number of pixels, outputted from the image pickup unit; and a still image processing unit for outputting as still image data the image signal having the first number of pixels, read out from the second memory.

Image pickup apparatus for processing an image signal by using memory

A recording apparatus is constructed so that image data of a plurality of frames extracted at predetermined timings from moving image data supplied from an image pickup unit is reduced in size to generate a multi-picture from size-reduced images. The apparatus is provided with a moving image recording mode and a still image recording mode. In the moving image recording mode, moving image data is recorded on a recording medium. In the still image recording mode, image data of still images selected from a plurality of still images constituting a multi-picture is recorded on the recording medium.

Image recording apparatus with selection of still image to be recorded from multi-picture display

An object of the present invention is to provide a digital VTR wherein, without increasing a transmission rate of an image memory and a data bus corrected thereto, a double error correction coding and decoding process can be achieved. In order to achieve the object, an input and output memory for storing an image data according to an input and an output formats, and a recording and reproducing memory for storing the image according to an image format are provided. To the input and output memory , via an input and output bus , an input and output circuits and is corrected. In data transmission between the input output memory and the recording and reproducing memory , a format conversion, and coding and decoding of an external code are performed. To the recording and reproducing memory , via recording and reproducing bus , inner coding and decoding circuits A and B are corrected.

Image processing apparatus

An encoding apparatus includes: (a) input circuitry for inputting image data including luminance component data and chrominance component data; (b) block forming circuitry for dividing the image data input by input circuitry into blocks so as to divide the respective component data into the blocks separately, each of the blocks being formed by a same predetermined amount of the input image data; and (c) encoding circuitry for encoding the input image data divided into the blocks by the block forming circuitry. The encoding circuitry includes code amount control circuitry for controlling a code amount of encoded data on a unit basis of a predetermined number of blocks, the predetermined number of blocks being formed so as to include at least one of the blocks of each type of component data. In case the code amount of encoded data on a unit basis of the predetermined number of blocks exceeds a predetermined amount, the code amount control circuitry weights the chrominance component data more than the luminance component data in deleting codes of excess code amount over the predetermined amount.

Encoding apparatus

Where a recording medium recorded on at a slave side apparatus is reproduced, it has been made possible to perform on cite modification processing identical to that conducted at a master side apparatus, by reproducing, at the master side apparatus, the primary information added with parity symbol for error correction from the recording medium on which the primary information is recorded, correcting the symbol error of primary information reproduced at the reproducing means using the reproduced parity symbol, producing the flag which indicates the production of an uncorrectable symbol error in one unit of a block of a specified amount of information and thus outputting the modification information corresponding to the primary information and the flag and forming, at the slave side, the parity symbol for correction of error of primary information output at the master side apparatus and recording the primary information with the parity symbol and modification information, on the same recording medium. It has also become possible to conduct satisfactory modification processing when the symbol error is produced.

Encoding device and decoding device suitable for dubbing

An encoding apparatus including a block forming unit for dividing an input signal into blocks each consisting of a plurality of sample values, an orthogonal conversion unit for orthogonally converting the input signal blocks, a detection unit for detecting the characteristic of each block in accordance with orthogonal conversion coefficients obtained by the orthogonal conversion unit, a selection unit for selecting optimal quantization parameters which can realize a constant code amount obtained when the input signal blocks are encoded in a unit consisting of a plurality of input signal blocks, a changing unit for changing the quantization parameters selected by the selection unit in accordance with an output from the detection unit, and an encoding unit for encoding the orthogonal conversion coefficients from the orthogonal conversion unit using the quantization parameters changed by the changing unit.

Code amount control device and encoding apparatus using the same

An image reproducing apparatus reproduces an encoded image signal, detects a motion vector of a block including undecodable image signal by using the reproduced image signal, and structuring an image signal for the block including the undecodable signal by using the motion vector to reproduce a visually high quality image even when the block including the undecodable image signal moves.

Protecting image quality from occurrence of uncorrectable errors

There is provided an image reproducing apparatus comprising a reproducing circuit for reproducing an image signal which was divided into blocks and encoded from a recording medium, a decoding circuit for decoding the image signal reproduced by the reproducing circuit, a movement detection circuit for respectively detecting and outputting movements of a plurality of blocks around a block including the image signal which cannot be decoded by the decoding circuit, and a constructing means for constructing an image signal for a block including the undecodable image signal, wherein a precision of a movement estimation of the undecodable image signal can be raised and an image which is hardly visually deteriorated can be obtained.

Apparatus for image reproduction using motion estimation

This invention provides a recording and/or reproducing apparatus having a reproducing circuit for reproducing coded main information, and historical information, with respect to signal processing which was performed on the main information. An error correcting circuit corrects a code error in the main information. The reproducing circuit provides error correcting information with respect to the error correcting processing. A first constructing circuit constructs coded data based on the correcting information by concealing an error which cannot be corrected by said error correcting circuit. A decoding circuit decodes the main information provided by the first constructing circuit, and a second constructing circuit constructs decoded data by concealing the error, which cannot be corrected by the error correcting circuit, in the main data which has been decoded by the decoding circuit. The decoded data is constructed based on the historical information and the correcting information, thus preventing degradation of the signal and allowing a high quality image to be obtained.

Recording and/or reproducing apparatus which produces main information and historical information with respect to signal processing performed on the main information

Error correction code (ECC) encoding is performed by using a first ECC encoding means to add a first check code to each of a number of first code groups included in a code sequence. Additionally, a second ECC encoding means is employed to add a second check code to each of a number of second code groups. The second check code is extracted from a predetermined number of successive first code groups in the code sequence.

Error correction code encoder and decoder

Where a recording medium recorded on a slave side apparatus is reproduced, it has been made possible to perform on site modification processing identical to that conducted at a master side apparatus, by reproducing, the primary information added with parity symbol for error correction from the recording medium on which the primary information is recorded, correcting the symbol error of primary information reproduced at the reproducing unit using the reproduced parity symbol, producing the flag which indicates the production of an uncorrectable symbol error in one unit of a block of a specified amount of information and thus outputting the modification information corresponding to the primary information and the flag and forming, at the slave side, the parity symbol for correction of error of primary information output at the master side apparatus and recording the primary information with the parity symbol and modification information, on the same recording medium. It has also become possible to conduct satisfactory modification processing when the symbol error is produced.

There is provided an error correction decoding apparatus including a first operating unit including a Galois field polynomial operation circuit for obtaining a Galois field polynomial, a second operating unit including a Galois field operation circuit for performing an operation by using the Galois field polynomial, and a program generating unit for generating a control program for the first and second operating units, wherein the first and second operating unit are provided in parallel with each other. Also, there is provided an error correction decoding apparatus including a first operating unit including a Galois field polynomial operation circuit for obtaining a Galois field polynomial and a register circuit used when the Galois field polynomial operation circuit performs an operation, a second operating unit including a Galois field operation circuit for performing an operation by using the Galois field polynomial and a general-purpose operation circuit, a register unit used when the first and second operating unit perform operations, and a program generating unit for generating a control program for the first and second operating unit, wherein the first and second operating units and the register unit are provided in parallel with each other.

Error correction decoding apparatus

A construction circuit which constructs data of nondecodable blocks by using interpolation data generated by a predetermined method, a movement estimation circuit which estimates the movement of the nondecodable blocks on the basis of the movement of the blocks surrounding the nondecodable block, and an error pattern detecting circuit which detects an error state of the surrounding blocks and controls the movement estimation circuit on the basis of the error state, are provided. The construction circuit constructs nondecodable data on the basis of the result of the estimation by the movement estimation circuit. An image reproducing apparatus is provided which is capable of obtaining a reproduced image having reduced visual deterioration by estimating movement on the basis of the blocks surrounding the nondecodable block when the data of the nondecodable block is reproduced and detecting the error state of the adjacent blocks.

Image reproducing apparatus

In transferring image data between a first memory for storing image data in a first sequence and inputting and outputting the image data from and to a first data bus and a second memory for storing image data in a second sequence different from the first sequence and inputting and outputting the image data from and to a second data bus, the permission and the inhibition of the writing of the transferred image data to a transfer destination are controlled and the error detection/correction encoding/decoding is effected during the transfer to facilitate the address management and permit high speed processing of the image data.

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Yokohama, Japan

Tetsuya Shimizu