Sharp Kabushiki Kaisha Corporation

Xenogenic Development Limited Liability Company

Tetsuya Ohnishi

Takashi Nakano

Takahiro Shibuya

Kazuya Ishihara

Yasunari Hosoi

Shinobu Yamazaki

Shigeo Ohnishi

Masayuki Tajiri

Naoyuki Shinmura

Takashi Yokoyama

Shinji Horii

Yushi Inoue

Kazushi Naruse

Takahiro Shibiuya

A variable resistive element comprising a configuration that an area of an electrically contributing region of a variable resistor body is finer than that constrained by an upper electrode or a lower electrode and its manufacturing method are provided. A bump electrode material is formed on a lower electrode arranged on a base substrate. The bump electrode material is contacted to a variable resistor body at a surface different from a contact surface to the lower electrode. The variable resistor body is contacted to an upper electrode at a surface different from a contact surface to the bump electrode material. Thus, a cross point region between the bump electrode material (the variable resistor body) and the upper electrode becomes an electrically contributing region of the variable resistor body, and then an area thereof can be reduced compared with that of the region regarding the conventional variable resistive element.

Variable resistive element, and its manufacturing method

Provided are a variable resistive element having a configuration that the area of an electrically contributing region in a variable resistor body is smaller than the area defined by an upper electrode or a lower electrode, and a method for manufacturing the variable resistive element. The cross section of a current path, in which an electric current flows through between the two electrodes via the variable resistor body at the time of applying the voltage pulse to between the two electrodes, is formed with a line width of narrower than that of any of the two electrodes and of smaller than a minimum work dimension regarding manufacturing processes, so that its area can be made smaller than that of the electrically contributing region in the variable resistive element of the prior art.

Variable resistance element, and its manufacturing method

A semiconductor memory device having a cross point structure includes a plurality of upper electrodes arranged to extend in one direction, and a plurality of lower electrodes arranged to extend in another direction at a right angle to the one direction of the upper electrodes. Memory materials are provided between the upper electrodes and the lower electrodes for storage of data. The memory materials are made of a perovskite material and arranged at the lower electrodes side of the corresponding upper electrode extending along the corresponding upper electrode.

Structure and manufacturing method of semiconductor memory device

A manufacturing method for a variable resistive element according to which a stable switching operation can be achieved with excellent reproducibility is provided. A conductive thin film is deposited on a semiconductor substrate and patterned to a predetermined form, and after that, a first interlayer insulating film is deposited. An opening is then created in a predetermined location on the first interlayer insulating film in such a manner that the upper surface of the conductive thin film is exposed and the thickness of the conductive thin film formed at the bottom of this opening is reduced through processing, and after that, an oxidation process is carried out on the periphery of the exposed conductive thin film. As a result, a variable resistor film is formed in the peripheral region of the opening, and this variable resistor film divides the conductive thin film into a first electrode and a second electrode.

Manufacturing method for variable resistive element

A memory cell in a semiconductor memory device comprises a variable resistor element configured so that a variable resistor body is sandwiched between a first electrode and a second electrode, and a transistor element capable of controlling a flow of current in the variable resistor element, wherein the transistor element and the variable resistor element are placed one over the other along a direction in which the first electrode, the variable resistor body, and the second electrode of the variable resistor element are layered, and one of the first electrode and the second electrode of the variable resistor element is connected to one electrode of the transistor element.

Memory cell, semiconductor memory device, and method of manufacturing the same

A method for fabricating a semiconductor device including carrying out an ion implantation into a predetermined region of a single-crystal silicon substrate to form therein an amorphized ion-implanted layer according to any one of the methods: (A) implanting an ion of an atom serving as carrier into the predetermined region, followed by implanting an ion of an electrically inert atom or molecule into the region, (B) implanting an ion of an electrically inert atom or molecule in the region, followed by implanting an ion of an atom serving as carrier in the region, and (C) implanting an ion of a molecule in which an atom serving as carrier is bonded to an electrically inert atom; annealing the substrate in an inert atmosphere to crystallize the amorphized ion-implanted layer again; and further annealing the substrate in an oxidizing atmosphere to eliminate defects at the interface of the substrate and the ion implantation layer.

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Nara, Japan

Tetsuya Ohnishi