Nec Corporation

Tetsuya Minakami

Hiroaki Inoue

Yoshiyuki Ito

Junji Sakai

Masato Edahiro

In the application parallel processing system, on specific one of processors forming a multi-processor, an application is operated independently of other processors and on other processors, a function expansion module is operated in parallel processing under control of the application. As a result, even in such a data processing device internally provided with a processor whose processing capacity is small as a portable terminal, applications can be operated smoothly.

Application parallel processing system and application parallel processing method

The present invention relates to a parallel processing system by an OS for single processor capable of operating an OS for single processor and an existing application on a multiprocessor and achieving parallel processing by a multiprocessor with respect to the application, wherein the multiprocessor are logically divided into two groups, i.e., a first processor side and a second processor side, and units of work that are parallelizable within the application operating on the processors on the first processor side are controlled as new units of work on the processors on the second processor side.

Parallel processing system by OS for single processor

An edge correction apparatus for a digital video camera includes horizontal and vertical edge signal generators, horizontal and vertical edge signal gain controllers, an adder, a slice processor, and a vertical edge component suppression position detector. The horizontal and vertical edge signal generators respectively generate horizontal and vertical edge correction signals in the horizontal and vertical directions of a sensed image obtained via the image sensing element of a digital video camera. The horizontal and vertical edge signal gain controllers control the gains of the horizontal and vertical edge correction signals. The adder adds the horizontal and vertical edge correction signals whose gains are controlled. The slice processor adds, to the image processing signal of the digital video camera, an edge correction signal obtained by performing slice processing for an edge signal output from the adder. The vertical edge component suppression position detector causes the vertical edge signal gain controller to execute gain control of the vertical edge correction signal in accordance with a horizontal difference signal output from the horizontal edge signal generator.

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Tokyo, Japan

Tetsuya Minakami