Denso Corporation

Tetsuya Makihara

Kazutaka Honda

Masakiyo Horie

Ryotaro Miura

Yukihiro Tomonaga

Shogo Kawahara

Nobuyoshi Osamura

Shogo Hikosaka

Takeshi Morinaga

Kazunori Nagaya

An amplifier circuit includes a main amplifier and an auxiliary circuit that improves a slew rate of the main amplifier. The main amplifier is composed of a one-stage CMOS amplifier, amplifies a voltage difference between two input signals, and outputs, from output terminals, an output signal corresponding to the voltage difference of the input signals. The auxiliary circuit controls an auxiliary bias current flowing through the output terminals according to the voltage difference of the input signals, and interrupts the auxiliary bias current at a predetermined timing before completion of settling. Such a scheme enables improvement of a slew rate by the auxiliary circuit and high-speed operation as well as reduction of error due to mismatch between the main amplifier and the auxiliary circuit, thereby yielding high-accuracy output signal output therefrom.

Amplifier circuit

A route switching circuit includes: a pair of normal detection routes that output voltages of a positive side connection point and a negative side connection point, which are different from each other, in multiple batteries for constituting an assembled battery; and a pair of diagnosis detection routes that output the voltages of the positive side connection point and the negative side connection point, and confirm a connection state of the normal detection routes by using the normal detection routes, which output at least one of a voltage of a positive side battery connected to a positive side from the positive side connection point and a voltage of a negative side battery connected to a negative side from the negative side connection point.

Route switching circuit and voltage detection device

A first part circuit and an operational amplifier form a level shift circuit, which selects either one of battery cells forming an assembled battery and extracts and holds a voltage representing an inter-terminal voltage of a selected battery cell. A second part circuit and the operational amplifier form a residual voltage generation circuit, which generates a residual voltage by amplifying a differential voltage between a conversion subject voltage and an analog voltage corresponding to a conversion result of an A/D conversion circuit and applies the residual voltage to the A/D conversion circuit as a conversion subject voltage. A switchover circuit operates the operational amplifier as either one of the level shift circuit and the residual voltage generation circuit and switches over a connection-state to apply a voltage held by the level shift circuit to the A/D conversion circuit and the residual voltage generation circuit as a conversion subject voltage.

Voltage detection device

In a voltage detecting device, a control unit turns on first switches and fifth switches corresponding to a plurality of unit batteries of an assembled battery to charge electric charge to first capacitors. The control unit simultaneously turns off at least one of the first switches or the fifth switches to hold the electric charge in the first capacitors. While selecting one of the unit batteries in a predetermined order as a target unit battery for voltage detection, the control unit temporarily turns off a fourth switch to reset electric charge of a second capacitor, and then turns of second switches and third switches in a state where one of the first switches and one of the fifth switches corresponding to the target unit battery are kept in an off state, thereby to detect a voltage of the target unit battery.

Voltage detecting device for assembled battery

A logic signal transmission circuit includes a driving circuit, an isolation section, and a latch section. The driving circuit converts an input digital signal to a differential digital signal. The isolation section blocks direct current and passes the differential digital signal. The latch section has even numbers of inverters which are connected in a loop and output a logic signal by turning ON and OFF a power supply voltage in a complementary manner. An input impedance of the latch section is set so that when a logic level of the differential digital signal changes, a transient voltage inputted through the isolation section to the latch section changes across a threshold voltage of the latch section. When the transient voltage changes across the threshold voltage, a logic level of the logic signal changes.

Logic signal transmission circuit with isolation barrier

A voltage detection apparatus includes an operational amplifier, first and second switches coupled between a terminal of a detection target voltage source and a common node, a first capacitor including a plurality of capacitor elements coupled in series between the common node and an inverting input terminal of the operational amplifier, a third switch and a second capacitor, which are coupled between the inverting input terminal and an output terminal of the operational amplifier, a reference voltage selection circuit which applies one of a first reference voltage and a second reference voltage differing from one another to a non-inverting input terminal of the operational amplifier, and a controller which is capable of selecting a voltage detection mode and a self-diagnostic mode.

Voltage detection apparatus and combination circuit

An operational amplifier has an input biased at a predetermined reference voltage. A control unit opens both second switches and third switches corresponding to unit batteries being non-detection object, closes fourth switch. The control unit further closes both one of first switches and one of third switches corresponding to one unit battery being a detection object to charge corresponding one of first capacitors. Thereafter, the control unit opens the fourth switch. The control unit further closes one of the second switches corresponding to the one unit battery being the detection object, instead of the one of the first switches. Thus, the control unit detects a voltage of each of the unit batteries.

Voltage detection device for assembled battery

A control circuit connects a capacitor to an input terminal and an output terminal of an operational amplifier and applies a signal charge to charge the capacitor with a switch being turned off. Thus, a conversion voltage corresponding to the signal charge is outputted from the operational amplifier. The control circuit then sets charges, which correspond to the conversion voltage, in capacitors and reallocates the charges among the capacitors by connecting non-common electrodes of the capacitors to either one of a plurality of reference voltage lines in accordance with a conversion result of an A/D conversion circuit with the capacitor being connected to the input terminal and the output terminal of the operational amplifier. The control circuit thereafter performs, a number of times, charge setting, initialization and subsequent charge reallocation in accordance with a residual voltage outputted from the operational amplifier.

Cyclic A/D converter

An A/D converter device is provided, which has a D/A conversion function and changes a resolution of A/D conversion and D/A conversion. The A/D converter device is configured to selectively execute an A/D conversion operation and a D/A conversion operation, by the operation of a control circuit controlling switching of switches according to an ADC/DAC function switching signal supplied from an external side. The A/D conversion operation performs A/D conversion of an input signal voltage inputted via a signal input terminal from an external side and outputs an A/D conversion value of 12 bits. The D/A conversion operation outputs, via a signal output terminal, an analog voltage produced by performing D/A conversion of a digital value supplied from the external side.

A/D converter device and signal processing unit

An amplifier circuit is provided to be switchable between a single end output configuration and a differential output configuration without increasing a circuit area. When first and fourth switches are turned off and a second switch is turned on, a load circuit functions as an active load on a differential pair and a first output terminal is internally disconnected. The amplifier circuit is provided with a single end output configuration and differentially amplifies input voltages inputted to input terminals and outputs an imbalanced signal from a second output terminal. When the first and fourth switches are turned on and the second switch is turned off, the load circuit functions as a load on the differential pair and the first output terminal is internally connected. The amplifier circuit is provided with a differential output configuration and differentially amplifies the input voltages inputted to the input terminals and outputs balanced signals from the output terminals.

Amplifier circuit, signal processor circuit, and semiconductor integrated circuit device

A sample and hold circuit includes an op-amp, inverting-side capacitors, and non-inverting-side capacitors paired with the inverting-side capacitors. At least one capacitor pair serves as a feedback capacitor in a holding phase. A total capacitance of the inverting-side capacitors to which an input voltage is applied in a sampling phase is &#x3b1;, a total capacitance of the non-inverting-side capacitors to which the input voltage is applied in the sampling phase is &#x3b2;, a total capacitance of the inverting-side capacitors to which the input voltage is applied in a holding phase is &#x3b3;, and a total capacitance of the non-inverting-side capacitors to which the input voltage is applied in the holding phase is &#x3b7;. &#x3b1; is substantially different from &#x3b2;. A total capacitance of a feedback capacitor pair is substantially equal to (&#x3b1;&#x2212;&#x3b2;&#x2212;&#x3b3;+&#x3b7;)&#xb7;(N/2), where N is a positive number.

Sample and hold circuit, multiplying D/A converter having the same, and A/D converter having the same

A sample hold circuit includes an op-amp, first capacitors provided on an inverting side of the op-amp and second capacitors provided on a non-inverting side. The sample hold circuit is configured such that a total capacitance of the first and second capacitors to which an input voltage is applied in a sampling phase is equal to that of the first and second capacitors to which the input voltage is applied in a holding phase, a total capacitance of the first capacitors to which the input voltage is applied in the holding phase is equal to that of the second capacitors to which the input voltage is applied in the holding phase, and a total capacitance of the first capacitors to which the input voltage is applied in the sampling phase is different from that of the second capacitors to which the input voltage is applied in the sampling phase.

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Nukata-gun, Japan

Tetsuya Makihara