Fujitsu Corporation

Fujitsu Semiconductor Limited

Other

Fujitsu Microelectronics Limited

Tetsuya Hiraoka

Akira Takashima

Junichi Kasai

Kazuto Tsuji

Mitsutaka Sato

Tsuyoshi Aoki

Takao Nishimura

Akira Okada

Kaname Ozawa

Kazuyuki Aiba

Yasuhiro Suzuki

Yasurou Matsuzaki

Yoshiharu Kato

Takaaki Suzuki

Satoru Kawamoto

Fumihiko Taniguchi

Masayoshi Hirata

Yuji Akashi

Hayato Okuda

Masahiko Harayama

A wiring board includes: a first wiring; a second wiring being disposed adjacently to the first wiring; a third wiring being disposed adjacently to the first wiring; a fourth wiring being disposed adjacently to the third wiring; and an insulating layer, wherein the second wiring and the fourth wiring are disposed adjacently to each other, the first wiring and the fourth wiring are not overlapped, the second wiring and the third wiring are not overlapped, a crest and a trough are provided on a side face of the first wiring, the crest and the trough are provided on a side face of the second wiring, the trough provided on the side face of the first wiring and the third wiring are overlapped, and the trough provided on the side face of the second wiring and the fourth wiring are overlapped.

Wiring board comprising wirings arranged with crest and trough

A semiconductor device capable of preventing contact between electrode terminals and a die pad as well as capable of surely performing wire bonding to the electrode terminals. A passive component is formed such that a vertical height of each electrode terminal is higher than that of an element part. More specifically, each cross-sectional area of the electrode terminals is slightly larger than that of the element part. Therefore, an upper part and lower part of each electrode terminal are slightly higher than (project from) the element part. Through an adhesive, the passive component is fixed such that the element part is located on the high position part so as to be nearly parallel to a substrate surface. Further, a part of each electrode terminal (bottom part) is located in each space within concave parts. Thus, a predetermined space is formed between each of the electrode terminals and the die pad.

Semiconductor device and manufacturing method thereof

Semiconductor device sealed with electrical insulation sealing member

A semiconductor chip is secured in a state deformed into a substantially cylinder shape by a coating material formed on its surface. The deformed semiconductor chip is flip-chip connected to an interposer and sealed with sealing resin onto the interposer. Solder balls are provided, as external terminals, on the other side of the interposer.

Deformable semiconductor device

The present invention relates to a semiconductor device having an MCP (Multi Chip Package) structure in which a plurality of semiconductor chips are mounted in the same package, a manufacturing method therefor and a semiconductor Substrate used therein. Atop a first semiconductor chip that is a memory chip is mounted a second Semiconductor chip that is a logic chip, with a first functional chip and a second functional chip that together form the first semiconductor chip being joined together via an unsliced scribe line. Additionally, a first functional chip and a second functional chip are given the same chip composition (32-bit memory) and respectively rotated 180 degrees relative to each other. These configurations are intended to improve performance, reduce costs and improve yield.

Multi chip package structure having a plurality of semiconductor chips mounted in the same package

A semiconductor device is configured of a first semiconductor chip mounted on a substrate, a plate member arranged on the first semiconductor chip, and a second semiconductor chip arranged on the plate member. Bonding wires electrically connect the pads of the first semiconductor chip and the pads of the second semiconductor chip to the pads of the substrate, and a sealing resin seals the first semiconductor chip and the second semiconductor chip. A first portion of the plate member is displaced away from the ends of the first and second semiconductor chips, and a second portion of the plate member extending perpendicular to the first portion, projects outward from the first and second semiconductor chips to be exposed to the outside.

Semiconductor device with stack of semiconductor chips

A substrate of a semiconductor device has a first surface on which a semiconductor element is fixed and a second surface opposite to the first surface. An adhesive is provided between the semiconductor element and the first surface of the substrate. At least one though hole is formed which extends between the first surface and the second surface of the substrate. A pattern member is formed on the first surface of the substrate so as to cover a part of an opening of the through hole.

Semiconductor device and manufacturing method of semiconductor device

The semiconductor device of the present invention with an IC chip provided on one side of a substrate, comprises a plurality of connection terminals, which are provided on the other side of the substrate, are electrically connected to the IC chip through electrical connecting devices, form a rectangular grid array, and are arranged in positions other than corners of the array.

Semiconductor device with connection terminals in the form of a grid array

A semiconductor device includes a substrate provided with a plurality of leads, a face-down semiconductor element provided on one surface of the substrate, a first stacked semiconductor element and a second stacked semiconductor element provided on another surface of the substrate and connected to the substrate by wires, and an extended wiring mechanism for connecting electrodes of the face-down semiconductor element and electrodes of the first and second semiconductor elements. The connected electrodes are equi-electrodes whose electrical characteristics are equal.

Semiconductor device

A process of manufacturing semiconductor device accommodated in a package including a semiconductor chip, a package body for accommodating the semiconductor chip, and a plurality of terminal members embedded in the package body in electrical connection to the semiconductor chip and projecting from a bottom surface of the package body, wherein each of said terminal members is of spherical form, such that the terminal members roll substantially freely when placed on a flat surface, and of a substantially identical diameter.

Process of using a jig to align and mount terminal conductors to a

A semiconductor device accommodated in a package includes a semiconductor chip, a package body for accommodating the semiconductor chip, and a plurality of terminal members embedded in the package body in electrical connection to the semiconductor chip and projecting from a bottom surface of the package body, wherein each of said terminal members is of spherical form, and of a substantially identical diameter.

Growing community of inventors

Kawasaki, Japan

Tetsuya Hiraoka