National Institute of Advanced Industrial Science and Technology

Other

Funai Electric Company Ltd.

Funai Electric Advanced Applied Technology Research Institute Inc.

Sharp Kabushiki Kaisha Corporation

Canon Kabushiki Kaisha

Evolvable System Research Institute, Inc.

Eastman-kodak Company

Agency of Industrial Science and Technology

Tokai University Educational System

Agency of Industrial Science & Technology, Ministry of International Trade & Industry

Harada Electronics Co., Ltd.

Evolvable Systems Research Institute Inc.

Cycolor Systems Co., Ltd.

Higuchi, Tetsuya

Tetsuya Higuchi

Masahiro Murakawa

Yuji Kasai

Eiichi Takahashi

Toshimi Fukuoka

Masao Suzuki

Wu Weng

Taro Itatani

Munehiro Uratani

Kenji Toda

Hidenori Sakanashi

Isamu Kajitani

Tetsuro Fukui

Kenji Kagami

Hirokazu Nosato

Yoichi Sato

Takahiro Uchibori

Motokazu Kobayashi

Masahide Harada

Masatoshi Ono

Masaharu Tanaka

Rikuo Takano

Nobuyuki Otsu

Kanji Otsuka

Katsuya Nishino

Tamotsu Usami

Takehiko Ooi

Toshio Adachi

Shogo Kiryu

Hiromi Tanaka

Yoshitaka Sugimoto

Shiro Suzuki

Yosuke Iijima

Takumi Kobayashi

Hiromi Ueda

Makoto Omodani

Takio Kurita

Masahiro Yasuda

Murakawa Masahiro

Kasai Yuji

A region segmented image data creating system for histopathological images is provided. The region segmented image data creating system is capable of creating region segmented image data required to generating a region segmented image. A first bi-level image data creating sectioncreates first bi-level image data, in which nucleus regions can be discriminated from other regions, from histopathological image data. A second bi-level image data creating sectioncreates second bi-level image data, in which a background regions can be discriminated from other regions, from the histopathological image data. A three-level image data creating sectionclarifies cytoplasm regions by computing a negative logical addition of the first bi-level image data and the second bi-level image data, and to create three-level image data as the region segmented image data.

Region segmented image data creating system and feature extracting system for histopathological images

Disclosed is a spectrum spread communication system which is hardly influenced by noises, and in which a frame structure can be identified at a receiving side without use of a frame synchronization signal. A spread code generator switches spread codes ('Scai' and 'Scbi') in each frame, and outputs it to a spread modulation unit. The spread modulation unit performs spread modulation of transmission data, and transmits it to a direct current power line. A reference code generator generates reference codes (&#x201c;Scai&#x201d; and &#x201c;Scbi&#x201d;) in the same code phase. Spread demodulation units performs spread demodulation of the received signal with use of the reference codes (&#x201c;Scai&#x201d; and &#x201c;Scbi&#x201d;), and output it to a selection unit. A frame synchronization detection unit identifies a frame structure on the basis of switching of a synchronization state of a code phase in a code phase synchronization detection unit. The selection unit outputs reception data by selecting spread demodulated data from the spread demodulation unit which is in a phase-synchronized state.

Spectrum spread communication system

Disclosed is an electrochromic display device comprising: a first and a second substrates; a first and a second electrodes; and an electrochromic composition layer, wherein the device is of a passive matrix drive where the a display and an erasion are performed by an energization in reverse directions between the electrodes, the first and the second electrodes respectively comprise a plurality of electrodes, a pixel is formed where the electrodes are in a grade separated crossing, and the display is performed by voltage application processing where: (i) the first electrode is set as negative, and the second electrode is set as positive, to apply a voltage of a first potential difference, immediately followed by (ii) the first electrode being set as positive, and the second electrode being set as negative, to apply a voltage of a second potential difference equal to or more than the first potential difference.

Electrochromic display device

A master node () sends an identification signal for designating a communication channel in an identification signal time slot. When the own node matches the node in which the communication channel designated by the identification signal sent from the master node () is set in the identification signal time slot, the master node () and slave nodes (to) each perform data transmission via the communication channel, based on the set contents of the communication channel, in the data transmission time slot corresponding to the identification signal time slot in which the identification signal has been sent.

Serial bus transmission system

An electrochromic display device including: a first substrate; first electrodes parallely extending on the first substrate; a second substrate opposite to the first substrate; second electrodes parallely extending in a direction orthogonal to the first electrodes on the second substrate; and an electrochromic composition layer between the substrates, wherein the device is passive-matrix driven to perform a display by energization between the electrodes, and to perform erasing of the display by energization in a reverse direction, a pixel is formed in a portion where the first electrodes sterically intersect with the second electrodes, and metal electrical wires extending over the regions between the second electrodes and the second substrate along the second electrodes, each of metal electrical wires being conductively connected to each of the second electrodes corresponding to any one of the regions, and insulated from each of the second electrodes corresponding to the other regions.

Disclosed is an electrochromic display device, including, a first substrate, first electrodes provided on an upper surface of the first substrate, a second substrate provided to be opposed to the first substrate above the first substrate, the second substrate being formed of a transparent material, second electrodes provided on an undersurface of the second substrate, at least a part of the second electrodes being formed of a transparent electrode material, and an electrochromic composition layer provided between the first substrate and the second substrate. The electrochromic composition layer contains an electrochromic composition including a supporting electrolyte, a polar solvent, a leuco dye, a hydroquinone derivative and/or a catechol derivative, a ferrocene derivative, and a compound having a carbonyl group.

A network system by the present invention can quickly detect viruses and does not easily become a new cause of vulnerability. A packet data comparator branches inputted packet data into three branches, and includes an additional pattern matching unit which compares the branched data with the stored data and performs matching with collation patterns stored in a rewritable storage area, a fixed pattern matching unit which compares the branched data with the stored data and performs the matching with a logical operation configured with known collation patterns, a notification packet matching unit which compares the branched data with the stored data and finds a notification packet, and an identity detection aggregation unit which aggregates results from the respective matching units. Moreover, a virus filter, a virus checker, and a secure network system are realized by using the present invention.

Packet data comparator as well as virus filter, virus checker and network system using the same

A serial-parallel converter/encoder unitinputs a transmission symbol data at a transmission symbol rate that is one-Nth of a base-point symbol rate. A precoder/collatorcreates a transmission symbol waveform at the base-point symbol rate. The transmission symbol waveform becomes a transmission signal after passing through a roll-off filterwith a band corresponding to the base-point symbol rate and a modulator. A reception signal demodulated by a demodulatoris input to a fractionally-spaced equalizerthat operates at the base-point symbol rate and is forcibly equalized at the transmission symbol rate by using a reference signal. A level of a signal output from the fractionally-spaced equalizerat the transmission symbol rate is determined by a level determining unitand becomes a reception symbol data by a sawtooth-function output unit

Data transmitting method and data transmitting apparatus

Disclosed is an electrochromic display device comprising: a first substrate; a first electrode; a second substrate; a second electrode; and an electrochromic composition layer, wherein the device is of a passive matrix drive where the device performs a display by an energization between the electrodes, and performs a erasion of the display, wherein the first electrode comprises electrodes, the second electrode comprises a plurality of transparent display electrodes, a pixel is formed where the electrodes are in a grade separated crossing, at least a surface of the electrodes is respectively oxidized, the electrochromic composition layer comprising (i) insulative partition walls and (ii) an electrochromic composition including a supporting electrolyte, a polar solvent, and a leuco dye, and wherein the device displays a selected pixel by applying a voltage of a first potential difference, and applies the voltage of a second potential difference so as not to cause any energization.

A signal transmission apparatus of the invention comprises: a correlatorfor shaping a spectrum of a signal; and a precoderdisposed on a previous stage of the correlator and including an adder which subtracts an output signal of a feedback filter from an input signal, a modulo arithmetic unit which inputs an output signal of the adder and executes modulo arithmetic operation, and the feedback filter which inputs an output signal of the modulo arithmetic unit and is provided with a transfer function obtained by subtracting 1 from a transfer function of the correlator. The correlator may be IIR filter means having a desired notch characteristic. By disposing a correlator which can freely shape a transmission signal spectrum containing a deep notch and suppress only a specified band on a receiving side, the suppression of an external noise can also be realized.

Signal transmission apparatus and signal transmission method

A transmitting circuitconverts transmission data to a multilevel analog signal suitable for transmission. The multilevel analog signal is output to a cablevia an amplifier and a hybrid circuit. In the transmitting circuit, a waveform which compensates waveform deterioration at the cableis generated. A reception signal from the cableis input to a mixervia the hybrid circuitand an amplifier. The mixermixes the reception signal and a cancel signal output from a cancel signal generation circuitso as to remove undesired signals. In a receiving circuit, the signal output from the mixeris sampled by use of a plurality of sample-hold circuits, and subjected to analog sum-of-product computation which is performed by a matrix circuit for distortion compensation. Subsequently, the sampled signals are converted to digital signals. The digital signals are collectively subjected to processing such as parallel-serial conversion, whereby reception data and an evaluation signal are obtained. An adjustment control circuitincludes a CPU, and adjusts the respective circuits on the basis of the evaluation signal such that data can be correctly transmitted and received.

Digital data transmitting apparatus

A power consumption controlling apparatus controls power consumption of a high frequency amplifier to reduce the power consumption by adjusting a power supply voltage and a bias voltage of the high frequency amplifier which amplifies a high frequency transmitting signal. The power consumption controlling apparatus includes: a receiving circuit for receiving the high frequency transmitting signal amplified by the high frequency amplifier; an evaluating section for evaluating whether or not a receiving signal obtained from the receiving circuit satisfies a predetermined quality; and an adjusting section for adjusting the power supply voltage and the bias voltage in a range in which the receiving signal evaluated by the evaluating section satisfies the predetermined quality.

Power consumption controlling apparatus for high frequency amplifier

Delay time between an input of data to a circuit block and an output of the data from the data block is measured in accordance with a timing at which the data from the circuit block is acquired by a measurement register and a timing at which the data from the circuit block is acquired by a data latch. An LSI tester sets well voltage adjustment values so that delay time of each circuit block is averaged. From voltages generated by the adjustment voltage generating circuit, a selector selects voltages that are in accordance with the well voltage adjustment values. The voltages selected are applied to a well of a CMOS transistor of each clock timing adjustment circuit. Delay time between timings of inputted clocks is thus adjusted.

Signal timing adjustment device, signal timing adjustment system, signal timing adjustment amount setting program, and storage medium storing the program

A purpose of a high-speed signal transmission system of the present invention is to pass a high-speed digital signal through an outside-chip line exchanging a signal with a high speed LSI chip with a band higher than GHz. The high-speed signal transmission system of the present invention has a configuration of: insertion of a circuit for feeding back received information and adjusting a waveform at a sending side based on genetic algorithm; a device structure for automatically performing pump up and pump down of a transistor carrier; a transmission line of a wiring out of a transistor; and elimination of a common power source of a circuit.

High-speed signal transmission system

A digital circuit according to the present invention includes a pulse delay circuit where a driving current of an inverter is variable, for causing timing of a clock signal to be variable; and the pulse delay circuit has a stabilizing circuit for an amount of a pulse delay by a delay synchronizing loop, and a generating circuit for a pulse delay amount setting voltage with nonlinear characteristics. The present invention makes it possible to realize a timing delay circuit with high resolution, which is not influenced by an operating environment and requires only a small area for the circuit.

Digital circuit having delay circuit for adjustment of clock signal timing

Growing community of inventors

Tsukuba, Japan

Tetsuya Higuchi