Hitachi Chemical Company, Ltd.

Hitachi Chemical Dupont Microsystems, Ltd.

Tetsuya Enomoto

Kazutaka Honda

Yuuki Nakamura

Hidehiro Nakamura

Akira Nagai

Toshio Yamazaki

Hiroshi Kawazoe

Keiko Suzuki

Keishi Ono

Masayuki Ohe

Kazuya Soejima

Etsuharu Suzuki

Fumio Inoue

Akishi Nakaso

Shigeharu Arike

Masaaki Yasuda

Keiichi Hatakeyama

Norio Moriike

Keisuke Ookubo

Emi Miyazawa

Kousuke Hiroki

A resin composition including the following components (a) and (b). (a) A polyimide precursor having a structural unit represented by the following general formula (1); and (b) a compound represented by the following general formula (2): wherein in the formula Ris a tetravalent organic group, Ris a divalent organic group and Rand Rare independently a hydrogen atom, an alkyl group, a cycloalkyl group or a monovalent organic group having a carbon-carbon unsaturated double bond. Ris an alkyl group having 1 to 4 carbon atoms, Ris independently a hydroxyl group or an alkyl group having 1 to 4 carbon atoms, a is an integer of 0 to 3, n is an integer of 1 to 6, and Ris a group represented by the following general formula (3) or (4): wherein in the formula (3) or (4), Ris an alkyl group having 1 to 10 carbon atoms or a monovalent organic group derived from hydroxyalkylsilane and Ris an alkyl group having 1 to 10 carbon atoms, a monovalent organic group derived from aminoalkylsilane or a heterocyclic group, and Rand Rmay independently have a substituent. 

Polymide precursor resin composition

A polyimide precursor including a structural unit represented by the following general formula (1) in a ratio of 50 mol % or more based on the total structural units. In the general formula (1), A is a tetravalent organic group represented by the following general formula (2a), a tetravalent organic group represented by the following general formula (2b), or a tetravalent organic group represented by the following general formula (2c), and B is a divalent organic group represented by the following general formula (3). 

Polyimide precursor, photosensitive resin composition containing said polyimide precursor, and cured-pattern-film manufacturing method and semiconductor device using said photosensitive resin composition

A thermosetting resin composition for an underfilling of a semiconductor comprising, as essential components, a thermosetting resin, a curing agent, a flux agent and two or more inorganic fillers with different mean particle sizes, wherein the inorganic fillers include an inorganic filler with a mean particle size of no greater than 100 nm and an inorganic filler with a mean particle size of greater than 100 nm.

Thermosetting resin composition for sealing packing of semiconductor, and semiconductor device

A semiconductor encapsulation adhesive composition comprising (a) an epoxy resin, (b) a curing agent and (c) an antioxidant.

Semiconductor encapsulation adhesive composition, semiconductor encapsulation film-like adhesive, method for producing semiconductor device and semiconductor device

The present invention relates to a semiconductor-encapsulating adhesive, a semiconductor-encapsulating film-form adhesive, a method for producing a semiconductor device, and a semiconductor device. The present invention provides a semiconductor-encapsulating adhesive comprising (a) an epoxy resin, and (b) a compound formed of an organic acid reactive with an epoxy resin and a curing accelerator.

Semiconductor-encapsulating adhesive, semiconductor-encapsulating film-form adhesive, method for producing semiconductor device, and semiconductor device

To provide a method of manufacturing semiconductor devices, the method being capable of efficiently obtaining a singulated semiconductor chip upon which an adhesive is adhered and also capable of excellently bonding a semiconductor chip to a wiring substrate, and provide an adhesive film. A layered productin which a dicing tape, an adhesive layer, and a semiconductor waferare stacked in this order so that a circuit surfaceof the semiconductor wafermay face the dicing tapeside. A cutting position is recognized by recognizing a circuit pattern P in the circuit surfacefrom a rear surfaceof the semiconductor wafer. At least the semiconductor waferand the adhesive layerare cut in the thickness direction of the layered product. The dicing tapeis cured to peel off the dicing tapeand the adhesive layer. A projection electrodeof a semiconductor chipis aligned with a wiringof a wiring substrate. The wiring substrateand the semiconductor chipare bonded via an adhesive layerso that the wiringand the projection electrodemay be electrically connected to each other.

Production method of semiconductor device and bonding film

Disclosed is a manufacturing method of a multi-layer wiring board, which method includes: preparing connection boards, the connection boards having respectively an insulating resin composition layer, a connection conductor formed so as to pass through the insulating resin composition layer and a conductor circuit formed on the insulating resin composition layer and connected to the connection conductor; aligning the connection boards; and laminating the aligned connection boards by heating and pressing, so that the connection conductors, or the connection conductor and the conductor circuit, are conductively connected with each other, and the connection boards are mechanically connected with each other by the insulating resin composition layer. The connection boards are formed by specified processing, including use of a three-layer composite metallic layer.

Connection board, and multi-layer wiring board, substrate for semiconductor package and semiconductor package using connection board, and manufacturing method thereof

A wiring substrate () comprises an insulating base () with connection holes (), buried conductors () provided in the connection holes () without reaching a rear surface of the insulating base (), and wiring layersconnected to the buried conductors (). The buried conductors () thicken the wiring layers (), and can form aligning parts () on the rear surface of the connection holes () to be used for three-dimensional mounting structure. Each wiring layer () includes thin terminals (A), wirings (B) and thick electrodes (C). Not only the terminals (A) and wirings (B) but also the buried conductors () are raised by the same manufacturing process. A semiconductor element () is attached to the electrodes (C) of the wiring substrate ().

Method of manufacturing wiring substrate

Wiring board, semiconductor device, and method of manufacturing wiring board

Growing community of inventors

Ibaraki, Japan

Tetsuya Enomoto