Kabushiki Kaisha Toshiba

Tetsuro Nozu

Akira Yoshioka

Hidetoshi Fujimoto

Toru Sugiyama

Kouhei Morizuka

Yoshitomo Sagae

Takuma Hara

Norio Iizuka

Junko Akagi

Masao Obara

Torakiti Kobayashi

According to one embodiment, a semiconductor device includes a semiconductor substrate, a semiconductor region, a first and second electrodes. The semiconductor region is provided on the semiconductor substrate via an insulating film. The semiconductor region includes a protection diode. An overvoltage causes breakdown of the protection diode. A PN junction of the protection diode is exposed at an end face of the semiconductor region. A first and second electrodes are provided distally to the exposed end face of the PN junction. The first and second electrodes are connected to the semiconductor region to provide a current to the protection diode.

Semiconductor device with a protection diode

A semiconductor device comprises an element region and a terminal region that surrounds the element region. The semiconductor device includes a first semiconductor region having a first conductivity type and a second semiconductor region having a second conductivity type and provided on the first semiconductor region. A third semiconductor region having the first conductivity type is provided on the second semiconductor region. A first electrode is electrically connected to the first semiconductor region. A second electrode is electrically connected to the third semiconductor region. A third and a fourth electrode are disposed in the element region. A distance from the first electrode to the third electrode is less than a distance from the first electrode to the fourth electrode.

Semiconductor device with varied electrodes

This device includes a first semiconductor layer of the first conduction-type. A second semiconductor layer of the first conduction-type is provided above the first semiconductor layer. Gate electrodes respectively have one end located at the second semiconductor layer and other end located at the first semiconductor layer. The gate electrodes extend at a first direction. Gate dielectric films are provided between the first semiconductor layer and the gate electrodes. A plurality of first insulating films are provided between the second semiconductor layer and the gate electrodes and are thicker than the gate dielectric films. A first electrode is provided at a shallower position than the other end between adjacent ones of the gate electrodes and contacts the first and the second semiconductor layer and the first insulating films. A second electrode is provided at an opposite side of the first layer against to the second semiconductor layer.

Trench MISFET

According to one embodiment, a semiconductor device includes a semiconductor layer having an opening formed therein, a first insulating layer disposed on a bottom surface of the opening and on a sidewall of the opening, a second insulating layer disposed on the sidewall of the opening above the first insulating layer, the second insulating layer being thinner than the first insulating layer, a field plate electrode disposed on the first insulating layer and the second insulating layer and having a recess extending from an upper surface of the field plate electrode towards the bottom surface of the opening, and a first layer disposed in the recess and including a material that is different from a material of the field plate electrode.

Semiconductor device

The performance of power semiconductor device of partial gate type structure may be improved by providing the source region only adjacent the gate electrodes in the structure, and providing the contact spaced from the gate by the source. The device includes a plurality of field plate electrodes which extend inwardly of the drift layer, a second field plate electrode disposed between the contact and one of the first field plate electrodes, and a gate electrode located between the source and a second one of the first field plate electrode.

Semiconductor device and manufacturing method of the same

According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a control electrode, a first main electrode, an internal electrode, and an insulating region. The control electrode is provided inside a trench. The first main electrode is in conduction with the third semiconductor region. The internal electrode is provided in the trench and in conduction with the first main electrode. The insulating region is provided between an inner wall of the trench and the internal electrode. The internal electrode includes a first internal electrode part included in a first region of the trench and a second internal electrode part included in a second region between the first region and the first main electrode. A spacing between the first internal electrode part and the inner wall is wider than a spacing between the second internal electrode part and the inner wall.

Semiconductor device and method for manufacturing same

In one embodiment, a bidirectional voltage-regulator diode includes first to fifth semiconductor layers formed on an inner surface of a first recess formed in a semiconductor substrate of an N-type in the order. The first semiconductor layer of the N-type has a first impurity concentration lower than an impurity concentration of the semiconductor substrate. The second semiconductor layer of a P-type has a second impurity concentration. The third semiconductor layer of the P-type has a third impurity concentration higher than the second impurity concentration. The fourth semiconductor layer of the P-type has a fourth impurity concentration lower than the third impurity concentration. The fifth semiconductor layer of the N-type has a fifth impurity concentration.

Bidirectional voltage-regulator diode

A semiconductor apparatus includes a semiconductor substrate, an insulating film provided on the semiconductor substrate, and a semiconductor film provided on the insulating film. The semiconductor substrate includes a region of a first current path including at least one diode, the semiconductor film includes a region of a second current path including at least one diode, the first current path and the second current path are connected in parallel to each other, the region of the first current path includes at least part of an area directly below the region of the second current path, and the first current path has a higher resistance than the second current path.

Semiconductor apparatus

A semiconductor device comprises a bonding surface to be mounted with adhesive or solder on a mounting surface of a mounting member. One or more grooves are provided on the bonding surface that extend in a direction substantially parallel to one side surface of the semiconductor device.

Semiconductor device and semiconductor apparatus

A bipolar transistor is provided which includes a GaAs substrate, an n-type collector region formed on the GaAs substrate, a p-type base region formed on the n-type collector region and having a p-type base layer of SiGe having a composition lattice-matched with the GaAs substrate, and an n-type emitter region formed on the p-type base region. A bipolar transistor may include a GaAs substrate, a collector region of a first conductivity type formed on the GaAs substrate and including a collector contact layer of the first conductivity type SiGe, which has a composition lattice-matched with the GaAs substrate, a base region of a second conductivity type formed on the collector region of the first conductivity type, and an emitter region of the first conductivity type formed on the base region of the second conductivity type.

Bipolar transistor with a GaAs substrate and a SiGe base or collector

According to the present invention, there is a provided a semiconductor device having, a collector contact layer made of an n-type GaAs layer; a first collector layer formed on the collector contact layer and made of an n-type GaAs layer; a second collector layer formed on the first collector layer and made of a p-type GaAs layer; a third collector layer formed on the second collector layer and made of an n-type InGaP layer; a fourth collector layer formed on the third collector layer and made of an n-type InGaP layer having an impurity concentration higher than that of the third collector layer; a fifth collector layer formed on the fourth collector layer and made of an n-type GaAs layer; a base layer formed on the fifth collector layer and made of a p-type GaAs layer; and an emitter layer formed on the base layer and made of an n-type InGaP layer.

Semiconductor device suited for a high frequency amplifier

A heterojunction bipolar transistor comprises, an emitter made of a first compound semiconductor of a first conductivity type; a base made of a second compound semiconductor of a second conductivity type and having a bandgap smaller than the first compound semiconductor; and a collector made of a third compound semiconductor of a first conductivity type and having a bandgap wider than the second compound semiconductor. The emitter and the base form a heterojunction of type I. The base and the collector form a heterojunction of type II. Further, the base includes impurities by a concentration equal to or more than 5&times;10 cm .

Heterojunction bipolar transistor and its manufacturing method

The present invention is directed toward a heterojunction bipolar transistor integrated circuit in which the collector layers of two heterojunction bipolar transistors are provided on a semi-insulating substrate. The collector layers have at least one surface that is sloped relative to the substrate. Base layers are provided on the sloped portions a common emitter layer is provided in contact with the base layers. Alternatively, the common emitter layer is provided on the substrate and etched to form to sloped surface thereon. Base and collector layers are then formed on the sloped surfaces of the common emitter layer.

Heterojunction bipolar transistors with sloped regions

A heterojunction bipolar transistor comprises n.sup.+ -type GaAs collector contact region, an n-type GaAs collector region, a p.sup.+ -type GaAs base region, an n-type AlGaAs emitter region, and an n.sup.+ -type InGaAs emitter contact region, all of which are formed on a semiinsulative GaAs substrate. A heterojunction is formed by the base region and the emitter region. The emitter region is formed in mesa shape by dry etching. Around this mesa, B.sup.+ ion-implanted high-resistance region is formed. The base-emitter Junction is isolated from the ion-implanted region. The heterojunction bipolar transistor therefore has little on-voltage changes.

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Tokyo, Japan

Tetsuro Nozu