Nec Corporation

Tetsuo Tateyama

Takashi Kuriyama

Yoshihiro Matsumoto

This optical receiving device for discriminating and recovering a data signal, which results from converting an optical signal input through a dispersion equalizer into an electrical signal and amplifying it to a pre-determined amplitude, by using a clock and data recovery circuit for discriminating a data signal at the decision point controlled to achieve the optimum position controls the dispersion characteristics of a dispersion equalizer so that the error count in the recovered data signal by using a clock and data recovery circuit will be minimized by controlling the eye pattern of the data signal which has been amplified to a pre-determined amplitude.

Optical receiving device, waveform optimization method for optical data signals, and waveform optimization program for optical data signals

The detection circuit comprising: a first D-type flip-flop circuit F/F , to which the data signal D and the clock signal C are input; a first delay circuit DL which delays the clock signal C by a prescribed amount of time, so as to generate a delayed clock signal C &prime;; a second D-type flip-flop circuit F/F , to which the output signal Q of the first D-type flip-flop circuit F/F and the delayed clock signal C &prime; are input; a second delay circuit DL which delays the an output signal Q of the second D-type flip-flop circuit F/F so as to generate a first delayed signal Q &prime;, a third delay circuit DL which delay the an output signal Q of the first D-type flip-flop circuit F/F so as to generate a second delayed signal Q &prime;, a fourth delay circuit DL which delays the data signal D so as to generate a delayed data signal D &prime;, a first AND circuit AND which calculates a logical product of the first delayed signal Q &prime; and the second delayed signal Q &prime; so as to output a DOWN signal, a second AND circuit AND which calculates a logical product of the second delayed signal Q &prime; and the delayed data signal D &prime; so as to output an UP signal, and an adder circuit ADD which adds the UP signal and the DOWN signal so as to output a detection signal PDOUT detecting the phase difference between the data signal D and the clock signal C

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Tokyo, Japan

Tetsuo Tateyama