Texas Instruments Corporation

Kabushiki Kaisha Toyoda Jidoshokki Seisakusho

Tetsuo Tateishi

Christopher John Sanzo

Shinobu Aoki

Brian Ashley Carpenter

Xuening Li

Biranchinath Sahu

Masashi Nogawa

Shogo Mori

Matthew David Romig

Jiwei Fan

Kuang-Yao Cheng

Nandakishore Raimar

Yasunori Muramatsu

Hirokazu Tsujimoto

Siyuan Zhou

Pradeep V S R Pydah

Katsutomi Harada

Zhiming Hu

Hiroko Nakamura

The disclosure provides an over-current protection circuit. A signal generating block in the over-current protection circuit generates one or more input voltages, a summed voltage and an average voltage in response to one or more differential voltages. A control block generates one or more control signals in response to the one or more input voltages and the average voltage. An analog control loop block generates an initiation signal in response to the summed voltage and an output voltage. A phase control logic block generates one or more PWM (pulse width modulated) signals in response to the initiation signal and the one or more control signals.

Over-current protection in multiphase DC-DC switching regulators

A method for a DC to DC converter with a pseudo constant switching frequency is disclosed herein. For example, some embodiments provide a DC to DC converter having a switch connected to a switching node to control a voltage of the switching node, and a switching controller that is adapted to turn on and off the switch at a substantially constant frequency based at least in part on the voltage of the switching node. The switching controller includes a modulator connected to a control electrode of the switch and that is adapted to actuate and deactuate the switch, and a first timer that is connected to the switching node and to the modulator. The first timer uses the voltage of the switching node to determine an on-time for the switch.

DC to DC converter with pseudo constant switching frequency

DC-DC converter PWM controllers and dual counter digital integrators are presented for integrating an error between a reference voltage signal and a feedback voltage signal, in which a comparator, dual counters, and a DAC are used to provide a compensated reference to a modulator loop comparator which generates a PWM switching signal for controlling a power converter output voltage, with the second counter being selectively incremented or decremented when the first counter output indicates a predetermined value after the first counter output transitions in one direction through a predetermined count range to enhance loop stability, and a startup mode control allows fast integrator operation during initialization, with the ability to freeze integrator operation during overcurrent conditions.

DC-DC converter controller apparatus with dual-counter digital integrator

DC to DC converters and pulse width modulation controllers are presented with compensation circuitry to mitigate discontinuous conduction mode (DCM) undershoot and continuous conduction mode offsets in inductor current emulation information by providing compensation signals proportional to the output voltage and the converter off time (Toff) when the low side converter switch is actuated.

Emulation based ripple cancellation for a DC-DC converter

A DC-DC converter, having an output voltage and including at least one electronic switch; first circuitry controlling the output voltage by adjusting a switching frequency of the electronic switch, and second circuitry adjusting the switching frequency toward a target switching frequency when the switching frequency significantly deviates from the target switching frequency.

DC-DC converter

A controller for controlling a power chain in an electronic device can be used in either of two different applications. The first application requires the controller to produce drive signals for driving discrete power MOSFETs within the power chain. The second application requires the controller to produce an output PWM signal to control an integrated circuit having power MOSFETs integrated with MOSFET drivers within the power chain. The controller generally includes a sensor that detects which of the two applications the controller is in. The controller also generally includes outputs that produce, when the controller is in the first application, the drive signals for driving the discrete power MOSFETs. But when the controller is in the second application, one of the outputs is used to produce the output PWM signal for controlling the integrated circuit.

Controlling power chain with same controller in either of two different applications

Various apparatuses, methods and systems for a DC to DC converter with a pseudo constant switching frequency are disclosed herein. For example, some embodiments provide a DC to DC converter having a switch connected to a switching node to control a voltage of the switching node, and a switching controller that is adapted to turn on and off the switch at a substantially constant frequency based at least in part on the voltage of the switching node. The switching controller includes a modulator connected to a control electrode of the switch and that is adapted to actuate and deactuate the switch, and a first timer that is connected to the switching node and to the modulator. The first timer uses the voltage of the switching node to determine an on-time for the switch.

A synchronous Buck converter in a molded package (thicknessbetween 0.8 and 1.0 mm) has vertically assembled control () and sync () power FET chips and a driver chip (). The sync chip has one power terminal attached to the leadframe pad () and the opposite power terminal covered by a first copper layer () connected () to a first leadframe terminal (), the first layer providing a smaller resistance to a current between first terminal and pad than the resistance through the sync chip. The control chip has one power terminal attached to the first layer and the opposite power terminal covered by a second copper layer () connected () to a second leadframe terminal (), the second layer providing a smaller resistance to a current from the first to the second terminal than the resistance through the control chip. Connections () of layers () to leadframe terminals () are copper wires of 20 to 50 &#x3bc;m diameter, enabling currents between 3 and 30 A.

Structure and method for uniform current distribution in power supply module

An adjustable compensation offset voltage is applied to a comparator to vary turn-off timing of a synchronous rectifier. A comparator output indicates when current through an inductor coupled to the synchronous rectifier should be approaching zero. If the synchronous rectifier is turned off before the current through the inductor reaches zero, the compensation offset voltage is adjusted to delay the synchronous rectifier turn-off for the next switching cycle. If the synchronous rectifier is turned off after the current through the inductor reaches zero, the compensation offset voltage is adjusted to advance the synchronous rectifier turn-off for the next switching cycle. An up/down counter, in conjunction with a digital to analog converter, may be used to provide the adjustment to the compensation offset voltage. The adjustable compensation offset voltage improves the accuracy of synchronous rectifier turn-off in relation to a zero inductor current, thereby improving power converter efficiency.

Adaptive rectifier architecture and method for switching regulators

A controller for a DC/DC converter is provided. The controller comprises an error circuit, control logic, a high side driver, a low side driver, and an interface circuit. The error circuit is coupled to a feedback terminal so as to receives a feedback signal and is coupled to the control logic. The high side driver is coupled to the control logic and to a first output terminal so as to provide a first actuation signal, and the low side driver is coupled to the control logic and to a second output terminal so as to provide a second actuation signal. The interface circuit is also coupled to the control logic, including a first, second, and third voltage source, interface comparators, and current limited amplifier.

Single pin multi-VID bit interface circuit for dynamic voltage change of a DC/DC converter

A converter for a multi-phase current network can include a plurality of current sensors, each of the plurality of current sensors being configured to detect current for a respective phase of the multi-phase network. A current averaging circuit is configured to provide an indication of the average current for the multi-phase network based on the current detected by each of the plurality of current sensors. A modulator is configured to modulate at least one phase of the multi-phase network independently of each other phase of the multi-phase network based on a difference between the current detected for the at least one phase and the average current for the multi-phase network.

Current balancing for multi-phase converters

A DC-DC converter operates outside of an audible frequency range under light current load conditions with reduced switching frequency by reducing supply current and regulating output voltage. A control for the converter maintains the switching frequency above an audible frequency range and reduces supply current by modulating switch on-time, sinking supply current, or permitting negative supply current values. The output voltage of the converter is regulated by modulating switch on-time, clamping output voltage, or modifying feedback detector thresholds. The power converter operates with improved efficiency under light current load conditions, while avoiding operation in an audible frequency range to prevent the generation of audible noise in converter components.

High efficiency power converter operating free of an audible frequency range

In one embodiment, a switching regulator comprises a control circuit that activates and deactivates at least one power switch to control a voltage of a switching node. The system also comprises an inductor that conducts a current from the switching node to an output to generate an output voltage. The system further comprises a PWM comparison circuit that controls an on-time and/or an off-time of the at least one power switch based on a comparison of a feedback voltage and a reference voltage. The PWM comparison circuit comprises a ramp signal generator configured to provide a ramp signal having a non-zero slope that is combined with either the feedback voltage or the reference voltage at a beginning of either the on-time or the off-time. The PWM comparison circuit can be further configured to set the slope of the ramp signal to zero during the off-time in a discontinuous conduction mode.

Slope compensation for switching regulator

The objective of this invention is to provide a pulse signal generator with a simple constitution that can reduce the number of signals required for setting the pulse width, as well as a display device using said pulse signal generator. Pulse assignment signal DPinput to the initial stage of pulse signal generating units PG(i,)&#x2013;PG(i,) connected in cascade is sequentially transferred towards the last stage of the cascade connection. After transfer of the pulse assignment signal to the pulse signal generating unit in each stage, the count value of said pulse signal generating unit is initialized. Then, the pulses of pulse strings PS&#x2013;PSin the various pulse signal generating units are counted. The count value of the pulse string is compared to the pulse assignment signal in the comparison unit of each pulse signal generating unit, and, in accordance with the comparison result, the level of the drive pulse signal of the LED is inverted. The pulse intervals (pulse timing) of pulse strings PS&#x2013;PSare controlled individually by control unitso that the drive pulse signal output from the pulse signal generating unit has the desired pulse width.

Pulse signal generator and display device

A charge pump DC/DC converter having an improved the ripple characteristic in its output voltage and make it possible to adjust the boosting rate in a stepwise manner. In phase I, two flying capacitors C, Care connected in series between voltage input terminaland voltage output terminal. In this connection state, flying capacitor Cis charged by the current supplied from DC power supply, while flying capacitor Cdischarges to the load side. In phase II, flying capacitor Cis connected between voltage input terminaland voltage output terminal, while flying capacitor Cis connected between voltage input terminaland the ground potential. In this connection state, flying capacitor Cdischarges to the load side, while flying capacitor Cis charged by the current supplied from DC power supply

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Aichi, Japan

Tetsuo Tateishi