Seiko Instruments Inc

Ablic Inc.

Tetsuo Shioura

Kazutoshi Ishii

Shinjiro Kato

Naoto Inoue

Yoichi Mimuro

A semiconductor device includes a substrate; a laminate which is formed on one main surface side of the substrate, and includes an aluminum alloy wiring and an insulating film surrounding the aluminum alloy wiring; and a silicon nitride film covering the laminate, in which the silicon nitride film and the insulating film have an opening portion, through which the silicon nitride film and the insulating film, formed at a position overlapped with a bonding portion of the aluminum alloy wiring, and a deposition made of a residue caused by reverse sputtering, which contains silicon and nitrogen, adheres to a portion exposed from the opening portion of a surface of the aluminum alloy wiring, to form a film.

Semiconductor device and method of manufacturing the same

There is provided a semiconductor integrated circuit device for driving a display element of an organic EL display device, in which an output current is controlled with high accuracy. The semiconductor integrated circuit device includes a field effect MOS transistor capable of obtaining a high accuracy output current and used for an output circuit for driving the display element of the organic EL display device, and further, a fuse trimming element is provided to its gate electrode, so that the device is constructed by the field effect MOS transistor capable of obtaining a more accurate output current. Besides, the field effect MOS transistor has such a structure that even if Vth fluctuates, fluctuation in an output current value is kept low.

Semiconductor integrated circuit device

A protection circuit for an LCD controller IC comprises normally-off transistors through which a large current may escape, a resistor for disturbing the movement of charge in gate electrodes of transistors of an input circuit, and normally-off transistors for allowing electric charge in the gate electrodes of the transistors of the input circuit to escape. In one embodiment, the protection circuit includes first and second normally-off NMOS transistors connected to an input pad of the IC, a resistor arranged between the first and second normally-off NMOS transistors and the input circuit, and a third normally-off PMOS transistor and fourth normally-off NMOS transistor connected between the resistor and the input circuit.

Growing community of inventors

Chiba, Japan

Tetsuo Shioura