Hitachi, Ltd.

Hitachi Microcomputer System, Ltd.

Pioneer Electronic Corporation

Tetsuo Sato

Yasuo Kominami

Masakazu Hoshino

Hiroshi Ohno

Kazuo Watanabe

Yoshimi Iso

Tsutomu Noda

Akira Haeno

Yuichi Ohkubo

Yoshiyuki Takizawa

Hiroshi Kobayashi

A large amount of information on unsteady events each occurring at a plant at a time not predicted by the user is superposed on contents of a display of existing drawings in a form that allows the information to be recognized by the sense of sight with ease. When an unsteady event such as an alarm related to an object, represented by an existing figure on a picture, being monitored at the plant occurs, the unsteady event is represented by a balloon-like figure newly drawn in an unsteady-event display on the picture. Then, in order to show that the unsteady event is related to the monitored object represented by the existing figure, the balloon-like figure is connected to the existing figure by a straight line which serves as a string tied to the balloon. Inside the balloon-like figure, a string of characters is displayed for explaining the unsteady event. When a confirming operation is carried out by the user to acknowledge the occurrence of the unsteady event, the drawing of the unsteady event changes to another balloon-like figure which has an attribute representing the completion of processing of the confirming operation. It is not until a solution to the occurring unsteady event found later that the other balloon-like figure disappears.

Plant-operation-information displaying method and plant-operation

In a communications system having a plurality of stations interconnected by a two-line circuit, in which the two-line circuit consists of a data bus circuit for transmitting a series of data bits between at least one sending station and at least one receiving station of the plurality of stations and a clock bus circuit for transmitting clock signals in synchronism with each of the data bits; the data bus circuit sends a signal or a command requesting the receiving station to enter a standby or an execute state after taking in data supplied, while a logic value on the clock bus circuit is fixed. In more detail, the sending station transmits signals to make at least one of the receiving stations enter the standby state after taking in data and then sends data to another receiving station, after which the sending station sends a signal or command to make both the first and second receiving stations simultaneously enter the execute state. The signal or command requesting the standby or execute state is added at the end of a data packet containing a series of data. The data packet includes data to be transferred to the receiving station and an address of the receiving station.

Communications system having a semiconductor integrated circuit for

Communications system and a system control method

A signal transmission circuit includes a switched capacitor and a control circuit. The switched capacitor includes a capacitor and a plurality of switching means. The control circuit controls the frequency or level of a control signal to be applied to the switching means of the switched capacitor. By varying the frequency of the control signal with the control circuit, the equivalent resistance of the switched capacitor can be varied. By controlling the level of the control signal with the control circuit, at least one of the plurality of switching means is held in the 'off' state thereof, to substantially inhibit the signal transmission of the switched capacitor.

Signal transmission circuit

A digital audio disc player is equipped with a tracking/focus servo mechanism which automatically controls the tracking and focusing of a light beam projected on a disc. The vibration of an automobile or other vehicle containing the player is detected so that, when there is a significant amount of vibration, the control sensitivity of the tracking/focus servo mechanism is increased to prevent the occurrence of tracking and focusing errors.

Optical signal processing system with variable gain stage of servo

An indicating system includes first and second voltage comparators, first and second output circuits which are respectively supplied with output signals of the first and second voltage comparators, and first and second indicating elements which are connected to a common output terminal of the first and second output circuits. A first input terminal of the first voltage comparator is supplied with a first reference voltage, and a second input terminal thereof is supplied with a control signal. A first input terminal of the second voltage comparator is supplied with a second reference voltage, and a second input terminal thereof supplied with the control signal. When the voltage level of the control signal is higher than the first reference voltage, the first output circuit causes a current of a first polarity to flow to the common output terminal. As a result, the first indicating element is lit up, and the second indicating element is not. When the voltage level of the control signal is lower than the second reference voltage, the second output circuit causes a current of a second polarity to flow to the common output terminal. As a result, the second indicating element is lit up, and the first indicating element is not. When the voltage level of the control signal is intermediate between the first and second reference voltages, neither of the first and second indicating elements are lit up.

Indicating system

A digital-to-analogue converter for use in a digitally-recorded-signal reproducing apparatus comprises a first constant current source, a switch for allowing the constant current of the first constant current source to flow therethrough for a period corresponding to the digital data, a second constant current source generating a current flowing in the direction opposite to that of the current generated by the first constant current source, a switch for allowing the current of the second constant current source to flow therethrough for a predetermined constant period, and an integrator, wherein the sum of the first and second constant currents is integrated by the integrator. The analogue signal outputted by the integrator has a center level in the vicinity of the ground potential level.

Digital/analogue converter

An amplifier circuit has an operational amplifier and a negative feedback circuit. An input signal is applied to the non-inverting input terminal of the operational amplifier, whereby a first output signal is provided from the output terminal of the operational amplifier. The first output signal is fed back to the inverting input terminal of the operational amplifier through the negative feedback circuit. The negative feedback signal of the negative feedback circuit is fed back to the inverting input terminal through an impedance converter. Thus, a second output signal of low distortion factor is derived from the output terminal of the impedance converter.

Amplifier circuit

A signal processing circuit which can be used, for example, as a playback equalizer is formed in a semiconductor integrated circuit with a main path and a side path arrayed between the input terminal and the output terminal of the integrated circuit. The signals at the ends of the main and side paths are added together to obtain the output signal for the signal processor. A filter in the main path determines its frequency characteristics. On the other hand, a variable gain control means having substantially flat frequency characteristics is inserted in the side path and its gain can be changed in response to control data to control the output signal of the signal processor.

Signal processing circuit

An electric circuit is constructed of a first current mirror circuit and a second current mirror circuit. The first current mirror circuit has a first input transistor, a first coupling transistor and an output transistor, while the second current mirror circuit has a second input transistor, a second coupling transistor and the output transistor. First and second input terminals are respectively connected to the collectors of the first and second input transistors, and a common output terminal is connected to the collector of the output transistor. First and second additional transistors are respectively connected to the first and second input transistors, whereby an output current proportional to either greater value of two input currents supplied to the two input terminals is provided from the common output terminal.

Signal processing circuit employing an improved composite current mirror

A variable electronic impedance circuit is constructed of a voltage-current converter whose input terminal is supplied with an input signal voltage, and a variable-gain current amplifier whose input terminal is supplied with an output current of the voltage-current converter and whose output signal current is fed back to the input terminal of the voltage-current converter. In order to prevent the undesirable oscillation phenomenon of the variable electronic impedance circuit immediately after the closure of a power supply, a control circuit which operates for a predetermined time after the closure of the power supply is especially arranged. Since an output signal from the control circuit inhibits the operation of the variable-gain current amplifier during the predetermined time, the unstable operation immediately after the closure of the power supply can be prevented.

Variable electronic impedance circuit

Either an input signal of a combining network or an output signal of an inverter arranged on a main path is fed to a side path through a mode switch in a switchable signal compressor/signal expander. Since an input terminal of a control amplifier is connected to a variable filter without passing through a signal amplifier, the deviation of the detection characteristic of a rectifier and integrator attributed to D.C. offset voltages of the signal amplifier and the control amplifier can be reduced. On the other hand, a switchable signal compressor/signal expander in another aspect of performance has a reference voltage generator for producing a D.C. reference voltage, and the output D.C. level of the control amplifier is maintained at a level approximate to the D.C. reference voltage. The other ends of first and second capacitors of the rectifier and integrator are also supplied with the D.C. reference voltage, so that the fluctuation of the detection characteristic of the rectifier and integrator ascribable to the fluctuation of the D.C. reference voltage is reduced.

Switchable signal compressor/signal expander

An integrated voltage control variable gain circuit capable of exhibiting, when the external circuit network is connected in a first configuration, a low distortion factor of the output signal, and capable of effecting, when the external circuit network is connected in a second configuration, independent controls of gains for different two input signals. The integrated voltage control variable gain circuit is provided, in its integrated part, with a first operational amplifier circuit, a second operational amplifier circuit, a third operational amplifier circuit, a fourth operational amplifier circuit, a fifth operational amplifier circuit, a first gain control section and a second gain control section. The first operational amplifier circuit, the first gain control section and the third operational amplifier circuit are arranged in a first signal line, while, in the second signal line, arranged are the second operational amplifier circuit, the second gain control section and the fourth operational amplifier circuit. It is possible to select whether the fifth operational amplifier circuit is disposed on the second signal line, by selecting the configurations of the external circuit network.

Integrated voltage control variable gain circuit and a signal

A recording/playing circuit includes a noise reduction circuit, a switching circuit and a control circuit. The noise reduction circuit includes a pre-amplifier, a combining network, an inverter circuit and a side chain. The switching circuit has first, second and third input positions and an output terminal. The first input position is coupled to the output of the pre-amplifier, the second input position is coupled to the output of the inverter circuit, and the output terminal is coupled to the side chain. The third input position is connected to a muting circuit. The control circuit controls the switching circuit so that one of the electric signals applied to the first, second and third input positions of the switching circuit may be selectively transmitted to the output terminal of the switching circuit.

Recording/playing circuit

The cut-off frequency of a transistor drops remarkably when the collector-emitter voltage of the transistor is driven into the quasi-saturation region of about 1 V. To prevent this problem, the collector-emitter voltage of the transistor is detected and compared with a predetermined reference voltage by comparison-limiting means. The comparison-limiting means limits the base current of the transistor and thus restricts the drop in the collector-emitter voltage. Limiting the voltage drop in this manner prevents the transistor from being driven into the quasi-saturation region. The reference voltage is set to the p-n junction voltage in the forward direction. Hence, the drop in the collector-emitter voltage is limited to a value near this reference voltage.

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Takasaki, Japan

Tetsuo Sato