Kabushiki Kaisha Toyota Chuo Kenkyusho

Denso Corporation

Tetsuo Narita

Kazuyoshi Tomita

Tetsu Kachi

Masaki Matsui

Shinichi Hoshi

Keita Kataoka

Kenji Ito

Yutaka Nonomura

Teruhisa Akashi

Hirofumi Funabashi

Motohiro Fujiyoshi

Tsutomu Uesugi

Yoshiteru Omura

Keiichi Shimaoka

Daisuke Nakamura

Takashi Ozaki

Yoshiyuki Hata

Norio Fujitsuka

Hiroyuki Tarumi

Isao Aoyagi

Kanae Murata

Yoshinori Tsuchiya

Kenji Itoh

Hiroko Iguchi

Taishi Kimura

Nobuyuki Otake

Daigo Kikuta

A semiconductor device includes: a substrate; and an n-type layer including a nitride semiconductor formed on the surface of the substrate. In the n-type layer, the concentration of donor impurities (excluding O) is 1&#xd7;10cmor more and 1&#xd7;10cmor less, the concentration of C impurities is 1&#xd7;10cmor less, the concentration of O impurities is 1&#xd7;10cmor less, the concentration of Ca impurities is 1&#xd7;10cmor less, and the sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the donor impurities. Such a semiconductor device can be fabricated by using a halogen-free vapor phase epitaxy (HF-VPE) device.

Semiconductor device and method for manufacturing the same

A method of manufacturing a group III nitride semiconductor substrate may comprise introducing group III element vacancies to a first region of the group III nitride semiconductor substrate. The method may comprise introducing an acceptor element to a second region of the group III nitride semiconductor substrate. The second region may contact the first region at least in part. The method may comprise performing annealing to activate the acceptor element in the second region.

Group III nitride semiconductor device and method of manufacturing group III nitride semiconductor substrate

A group III nitride semiconductor substrate may include: a p-type conduction region into which a group II element has been implanted in a depth direction of the group III nitride semiconductor substrate from a surface of the group III nitride semiconductor substrate, the p-type conduction region having p-type conductivity, wherein hydrogen has been implanted from the p-type conduction region across an n-type conduction region adjacent to the p-type conduction region in the depth direction of the group III nitride semiconductor substrate.

Group III nitride semiconductor substrate

A nitride semiconductor device may comprise a p-type layer. The nitride semiconductor device may comprise a first n-type voltage-blocking layer in contact with the p-type layer. The nitride semiconductor device may comprise a second n-type voltage-blocking layer in contact with the first n-type voltage-blocking layer and separated from the p-type layer by the first n-type voltage-blocking layer. A donor concentration in the first n-type voltage-blocking layer may be lower than a donor concentration in the second n-type voltage-blocking layer. A carbon concentration in the first n-type voltage-blocking layer may be lower than a carbon concentration in the second n-type voltage-blocking layer.

Nitride semiconductor device and method of manufacturing nitride semiconductor device

A semiconductor device includes a GaN device provided with: a substrate made of a semi-insulating material or a semiconductor; a channel-forming layer including a GaN layer arranged on the substrate; a gate structure in which a gate-insulating film in contact with the GaN layer is arranged on the channel-forming layer, the gate structure having a gate electrode arranged across the gate-insulating film; and a source electrode and a drain electrode that are arranged on the channel-forming layer and on opposite sides interposing the gate structure. The donor element concentration at the interface between the gate-insulating film and the GaN layer and at the lattice position on the GaN layer side with respect to the interface is set to be less than or equal to 5.0&#xd7;10cm.

Semiconductor device and method for producing same

A step-flow growth of a group-III nitride single crystal on a silicon single crystal substrate is promoted. A layer of oxide oriented to a &#x3c;111&#x3e; axis of silicon single crystal is formed on a surface of a silicon single crystal substrate, and group-III nitride single crystal is crystallized on a surface of the layer of oxide. Thereupon, a &#x3c;0001&#x3e; axis of the group-III nitride single crystal undergoing crystal growth is oriented to a c-axis of the oxide. When the silicon single crystal substrate is provided with a miscut angle, step-flow growth of the group-III nitride single crystal occurs. By deoxidizing a silicon oxide layer formed at an interface of the silicon single crystal and the oxide, orientation of the oxide is improved.

Layered substrate with a miscut angle comprising a silicon single crystal substrate and a group-III nitride single crystal layer

Teaching disclosed herein is an apparatus comprising a support layer. The support layer may be adapted for supporting a heat generator, wherein the support layer includes a flow passage. The flow passage may seal working fluid therein. The flow passage may extend along a thickness direction of the support layer.

Apparatus and method of manufacturing a support layer

A semiconductor device is provided with an electronic transit layer, an electron supply layer, a source region, a drain electrode, a source electrode and an insulated gate. In a region between the drain electrode and the insulated gate, a two-dimensional electron gas layer is configured to be generated at a hetero junction between the electronic transit layer and the electron supply layer. A part of the insulated gate is configured to face to the source region.

Semiconductor device

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Nagakute, Japan

Tetsuo Narita