Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Corporation

Tetsuo Kunii

Yoshitsugu Yamamoto

Hirotaka Amasuga

Satoshi Suzuki

Hirofumi Nakano

Katsuya Kosaki

Naohito Yoshida

Akira Inoue

Koji Yamanaka

Ryo Hattori

Hiroyuki Kinoshita

Takayuki Matsuzuka

Hideaki Katayama

Takahide Ishikawa

Ko Kanaya

Yoshitaka Kamo

Kazuhiro Iyomasa

Seiki Gotou

Shohei Imai

Hiroaki Maehara

Junichi Udomoto

Motoyoshi Koyanagi

Hiroshi Kawata

Youichi Nogami

Hiromitsu Utsumi

Seiichi Tsuji

Toshikazu Oue

A semiconductor device is provided with one or more gate fingers () that are provided in an active region on a semiconductor substrate (), and a source finger () and a drain finger () that are provided in the active region and arranged alternately to allow each gate finger to be sandwiched between the source and drain fingers. The semiconductor device includes terminal circuit () that has inductive impedance at the frequency of a signal input to an input terminal of the one or more gate fingers, and is directly or indirectly connected to the one or more gate fingers at an area being spaced away from a connecting position of the input terminal () of the one or more gate fingers ().

Semiconductor device

A power amplifier includes: an amplifier; an input matching circuit connected to an input of the amplifier; an output matching circuit connected to an output of the amplifier; and a low-frequency processing circuit connected to the input matching circuit or the output matching circuit, wherein the low-frequency processing circuit includes a first line having a first end connected to the input matching circuit or the output matching circuit, a first shot stub connected to a second end of the first line and including a second line and a first capacitor connected in series each other, and a second short stub connected to the second end of the first line in parallel with the first short stub and including a third line and a second capacitor which are connected in series each other, the first line has a length of &#x3bb;/8, the second line has a length of &#x3bb;/4, and the third line has a length of &#x3bb;/8 with respect to a wavelength &#x3bb; of a fundamental frequency.

Power amplifier

A semiconductor device includes a substrate, a buffer layer of GaN containing at least one of Fe and C and disposed on the substrate, a channel layer of GaN disposed on the buffer layer and through which electrons travel, an electron supply layer disposed on the channel layer and producing a two-dimensional electron gas in the channel layer, a gate electrode, a drain electrode, and a source electrode. Recovery time of a drain current of the semiconductor device is no more than 5 seconds, where the recovery time is defined as the period of time after the semiconductor device is stopped from outputting high frequency power until the change in the drain current, after the stopping of the semiconductor device, reaches 95% of the change in the drain current occurring during the first 10 seconds after the stopping of the semiconductor device.

High electron mobility transistor with shortened recovery time

A semiconductor device includes: a package; an input matching circuit and an output matching circuit in the package; and transistor chips between the input matching circuit and the output matching circuit in the package. Each transistor chip includes a semiconductor substrate having long sides and short sides that are shorter than the long sides, and a gate electrode, a drain electrode and a source electrode on the semiconductor substrate. The gate electrode has gate fingers arranged along the long sides of the semiconductor substrate and a gate pad commonly connected to the gate fingers and connected to the input matching circuit via a first wire. The drain electrode is connected to the output matching circuit via a second wire. The long sides of the semiconductor substrates of the transistor chips are oblique with respect to an input/output direction extending from the input matching circuit to the output matching circuit.

Semiconductor device including transistor chips having oblique gate electrode fingers

A semiconductor device includes: a semiconductor substrate; an impurity-doped region at a top surface of the semiconductor substrate; an insulating region located around the impurity-doped region on the top surface of the semiconductor substrate; a gate electrode on the impurity-doped region; a first electrode and a second electrode located on the impurity-doped region, sandwiching the gate electrode; a first pad located on the insulating region and connected to the gate electrode; a second pad facing the first pad across the impurity-doped region, on the insulating region, and connected to the second electrode; and a conductor located between the first electrode and the second pad on the insulating region.

Semiconductor device including field effect transistor with reduced electric field concentration

A field-effect transistor includes a channel layer formed of a III-V compound semiconductor excluding aluminum; a gate contact layer formed of a III-V compound semiconductor and provided on the channel layer, the III-V compound semiconductor having a dopant concentration equal to or less than 1&#xd7;10cm, containing aluminum, and having a large band gap energy; a gate buried layer of a III-V compound semiconductor and provided on the gate contact layer; and a gate electrode buried in the gate buried layer and in contact with the gate contact layer. A recess in the gate buried layer is opposed to an upper side wall of the gate electrode with a gap therebetween and a part of the gate buried layer, and where a contact with a lower side wall of the gate electrode is established, part of the gate buried layer remains without being removed.

Field-effect transistor

A semiconductor device includes a substrate having a recess, a gate electrode in the recess in the substrate, and a source electrode and a drain electrode disposed on opposite sides of the gate electrode. An insulating film is on at least on a surface of the gate electrode and a portion in the recess, other than where the gate electrode is located, and a shield electrode connected to the source electrode is located on a portion of the insulating film between the gate electrode and the drain electrode.

Semiconductor device with recessed gate and shield electrode

A high-frequency power amplifier has an FET element having a unit FETs in multifinger form, and having a gate pad through which a signal is input, a source pad that is grounded, and a drain pad through which a signal is output. A high-frequency processing circuit includes series resonance circuits shunt-connected between the gate pads of the unit FETs and grounding ends. Two of the series resonance circuits have respective different resonance frequencies which correspond to second and higher harmonics of a frequency included in the operating frequency band of the FET element.

High-frequency power amplifier

A field effect transistor includes a semiconductor substrate having an active region, a source region, and a drain region at an upper portion of the substrate. The active region is located between the source and drain regions. A gate electrode is located on the active region. A source electrode is located on the source region and forms an ohmic contact with the source region. A drain electrode has a base part on and in ohmic contact with the drain region and an extended part having edge close to the gate electrode and over a boundary between the active region and the drain region. An insulating film is located between the boundary and the extended part and has a thickness that increases along a direction from the drain electrode toward the gate electrode in a step-by-step or continuous manner.

Field effect transistor

A semiconductor device includes a semiconductor substrate having a principal plane on which gate, source, and drain electrodes are located. A film made of a polymer with a low dielectric constant is over the gate and drain electrodes to insulate the gate and drain electrodes from the source electrodes. A chip surface electrode located over the low-dielectric-constant polymer film and the source electrode, and connected to ground potential. The source electrode is provided with the ground potential through the chip surface electrode.

Semiconductor device with polymer insulation of some electrodes

The present method includes steps of: discharging a droplet of fluid containing fine particles with electric characteristics from an inkjet nozzle onto the microwave integrated circuit formed on a substrate; forming a coat of the fine particles having electric characteristics on the substrate; measuring electric characteristics of the microwave integrated circuit using a probe of a circuit evaluation apparatus before and after forming the coat; and adjusting the electric characteristics of the microwave integrated circuit, so that forming the coat at a desired location on the upper surface of the circuit substrate by scanning an aim of the inkjet nozzle against the circuit substrate enables the microwave integrated circuit to meet the specification.

Method and apparatus for evaluating and adjusting microwave integrated circuit

An inexpensive and small-sized semiconductor device with high power output performance includes a semiconductor substrate; an active region on the semiconductor substrate; first and second channel regions on the active region so that width directions of the first and second channel regions are substantially perpendicular to each other, bent gate electrodes on the first and second channel regions; and source electrodes and drain electrodes on opposite sides of the bent gate electrodes.

Field effect transistor structure with bent gate

A semiconductor device having a plated heat sink (PHS) layer on the back surface, preventing a short circuit between a bonding wire, and a first metal layer. A method of making a semiconductor device including forming a catalyst layer on a bottom of a first separation groove in the front surface of a semiconductor substrate, and forming the first metal layer selectively in the first separation groove by electroless plating, using the catalyst layer as a catalyst.

A semiconductor device has a plated heat sink layer on the back surface, preventing a short-circuit between a bonding wire and a first metal layer. A method of making a semiconductor device includes forming a catalyst layer on a bottom of a first separation groove in the front surface of a semiconductor substrate, forming a first metal layer selectively in the first separation groove by electroless plating, using the catalyst layer as a catalyst.

Method for manufacturing semiconductor device and semiconductor device

A method of producing a semiconductor device includes a semiconductor substrate and a gate embedding layer. A pair of side walls made of insulating layers having a width are formed on the inner surface of a first opening and the gate embedding layer is formed by using the pair of side walls and a first insulating layer as masks so that the embedded portion and the first extending portion are self-aligned and, consequently, the first extending portion is symmetrical with respect to the embedded portion. Accordingly, the first extending portion of the gate electrode is offset toward the drain electrode or source electrode.

Growing community of inventors

Tokyo, Japan

Tetsuo Kunii