Kabushiki Kaisha Toshiba

Tetsuo Ishii

Kazuhiko Inoue

Takashi Kimura

Yutaka Tomisawa

Tatsuro Mitani

Taira Matsunaga

Shoichi Tanimata

Mie Nomura

A novel magnetoelectric element and a novel magnetoelectric apparatus convert a magnetic field into an electric capacitance and output it by utilizing the Lorentz force acting on a current in the magnetic field. The magnetoelectric element can convert a magnetic field into an electric capacitance and output it. The magnetoelectric apparatus includes the magnetoelectric element and an electric capacitance detecting unit, and can output a magnetic field as a change in frequency.

Magnetoelectric element and magnetoelectric apparatus

A Hall element and an amplifier for amplifying an output generated from the Hall element are formed in a GaAs substrate. The Hall element has a current path extending at an angle of 45.degree..+-.10.degree. to a cleavage direction of a GaAs wafer from which the GaAs substrate is formed. The amplifier comprises amplifying FETs for receiving the output generated from the Hall element, each of which has a current path extending in the direction of a crystal axis &lt;011&gt;.+-.10.degree.. The amplifier further comprises other semiconductor elements such as FETs and resistors, each of which has a current path extending in parallel with a dicing line, that is, extending at an angle of .+-.45.degree. to a cleavage direction of a GaAs wafer from which the GaAs substrate is formed.

Hall IC formed in GaAs substrate

This Schottky barrier gate field effect transistor has N.sup.+ -type source and drain regions formed in the surface area of a GaAs semi-insulation substrate, a channel region formed between the source and drain regions, and a gate electrode formed on this channel region. Particularly, in this Schottky barrier gate field effect transistor, the gate electrode has a first metal portion, which is preferably in Schottky contact with the channel region, and a second metal portion, which stably affixes to the first metal portion. The first and second metal portions are fixed to an insulative portion formed on the channel region.

Method of manufacturing a field effect transistor device having a

The signal-processing circuit of the present invention, more particularly the gain-controlled amplifier circuit, comprises a MOSFET (metal oxide semiconductor field-effect transistor), and an NPN bipolar transistor cascade-connected to the MOSFET. The gain-controlled amplifier circuit amplifiers the signal supplied to the gate of the MOSFET, with the gain corresponding to the voltage applied to the base of the NPN bipolar transistor. The circuit can generate an output signal at one end of the emitter-collector path of the NPN bipolar transistor, said output signal containing negligibly small distortion components; in particular, negligible third distortion components.

Signal-processing circuit having a field-effect MOSFET and bipolar

A method for manufacturing semiconductor devices is presented. The method comprises the steps of opening two windows on an insulating layer covering a semiconductor substrate, and forming a polysilicon layer over the entire surface of the insulating layer and the windows. Donor and acceptor impurities are respectively implanted into the portions of the polysilicon layer corresponding to the two opening windows through the appropriate photoresists. The doped impurities are thereafter subjected to annealing to form two different conduction type regions under the two opening windows. Thereafter, a metal layer and a photoresist are deposited in order to make the metal electrodes for each conduction region. Thus, the patterning of the polysilicon can be made in self-alignment with the etching mask, and the formation of two different conduction type semiconductor regions are simultaneously attained.

Growing community of inventors

Fujisawa, Japan

Tetsuo Ishii