Sony Corporation

Tetsumasa Meguro

Takahiro Seki

Takeshi Shimoyama

Yoshikazu Kurose

Hirokazu Kawahara

Tsutomu Teranishi

Masakatsu Nakai

Yasuo Nakano

A semiconductor integrated circuit able to operate by different power supply voltages resulting from fluctuations in production, provided with a process monitor circuit for obtaining a grasp of a delay characteristic corresponding to the conditions of a production process, a memory circuit for storing data concerning an extent of process variation acquired by the process monitor circuit, and a power supply voltage control circuit for adaptively controlling the power supply voltage in accordance with the extent of process variation acquired by the process monitor circuit and stored in the memory circuit, and a test method for guaranteeing the operation of the semiconductor integrated circuit.

Semiconductor integrated circuit and method of testing same

A frequency control apparatus and an information processing apparatus includes an observation section for observing an operation state of a control object which operates with a variably controlled frequency, a frequency determination section for determining a clock frequency in response to the operation state, and a frequency limitation section for limiting a range or a value of the clock frequency determined by the frequency determination section. If the frequency determined in response to the operation state of the control object is within an allowable range, the control is performed with the frequency, but if the frequency is outside the allowable range, the frequency is limited to the range.

Frequency control apparatus for controlling the operation frequency of an object

A semiconductor apparatus for flexibly and effectively configuring a delay monitor circuit without an increase in circuit scale includes a delay signal generation circuit for switching the configuration of delay element arrays based on first configuration information and second configuration information and propagating a delay element array wherein a pulse is switched, a register group having a first register for the first configuration information and a second register for second configuration information, a selector for outputting to the delay signal generation circuit the first configuration information and second configuration information in accordance with an instruction of a selection signal in a time sharing way, and a control circuit for controlling a power source voltage based on delay information of a delay element array and outputting to the selector a selection signal to select from the first configuration information and second configuration information in a time sharing way.

Semiconductor apparatus for monitoring critical path delay characteristics of a target circuit

A clock switching circuit is provided for switching from a first clock signal being output to a freely selected second clock signal among a plurality of clock signals having different frequencies and phases while preventing generation of a hazard. The switching circuit has a plurality of unit circuits for respectively receiving as an input the clock signals, selection signals of the clock signals and enabling signals and controls supplying and stopping of the clock signals in accordance with the selection signals and the enabling signals. A feedback circuit monitors output conditions of the plurality of unit circuits and, when outputting of all clock signals of the plurality of unit circuits was stopped as a result of stopping the first clock signal, giving a plurality of the unit circuits the enabling signal for approving starting of a supply of the second clock signal.

Clock switching circuit

A clock generation circuit for generating clocks having a plurality of frequencies by which a suitable frequency for each task can be supplied such that the power consumption is reduced. A clock generation unit is provided for generating a clock with a constant frequency, with a counter operating in synchronization with the clock for counting pulses of the clock, a comparator for comparing a counter value of the counter with the number of pulses of a clock having a desired frequency, and an output gate for controlling the supply and stopping of pulses of the clock input from the clock generation unit based on a comparison result of the comparator.

Clock generation circuit and clock conversion circuit

A power-supply voltage frequency control circuit capable of changing a clock frequency in accordance with processing and assuring an operation of a target circuit when supplying a power-supply voltage in accordance therewith, comprising a clock supply circuit capable of supplying a system clock of a plurality of clock frequencies and supplying a system clock having a clock frequency in accordance with a first control signal to a target circuit performing processing in synchronization with the system clock, a power-supply voltage supply circuit for supplying a power-supply voltage of a value in accordance with a second control signal to the target circuit, and a control circuit for outputting the first control signal to the clock supply circuit and a second control signal to the power-supply voltage supply circuit by following an instruction of a frequency change value and a change time from the target circuit.

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Tokyo, Japan

Tetsumasa Meguro