Sony Corporation

Tetsuji Nagayama

Tetsuya Tatsumi

Shingo Kadomura

Toshiharu Yanagida

Tetsuo Gocho

Masaki Minami

A method for producing a semiconductor device capable of stably removing a sidewall mask layer without removal of an etching stopper film, wherein a conductive layer 30 and a first diffusion layer 11 are formed in a semiconductor substrate 10, an etching stopper film 21 is formed covering the conductive layer 30, a sidewall mask layer 31b containing silicon is formed at an upper layer of the etching stopper film 21 facing a sidewall surface of the conductive layer 30, and a second diffusion layer 12 is formed. Here, a conductive impurity is introduced into at least the sidewall mask layer 31b at either of the time of formation of the sidewall mask layer 31b or the time of formation of the second diffusion layer 12, and heat treatment for activating the conductive impurity in the sidewall mask layer 31b is applied. Next, the sidewall mask layer 31b is removed, and the insulating film 22 is formed over the entire surface at an upper layer of the etching stopper film 21, and a contact hole CH reaching the second diffusion layer 12 is formed in the insulating film 22.

Method for producing semiconductor device

A method of forming a connection hole, which includes the steps of: laminating an etching stopper film made of a SiN based material and an interlayer insulating film made of a SiOx based material on a substrate in this order; forming an organic film pattern on the interlayer insulating film on the basis of a connection hole pattern; dry-etching the interlayer insulating film using the organic film pattern as a mask while keeping a selection ratio to the etching stopper film; a fourth step of removing a carbon based protective film which is deposited on an exposed surface of the etching stopper film by the dry etching, using an etching reactive system including an oxygen based chemical species; and a fifth step of completing a connection hole by selectively etching the etching stopper film.

Method of forming connection hole

A semiconductor device in which dry etching properties are rendered compatible with satisfactory anti-reflection characteristics in far-infrared lithography the semiconductor device has a semiconductor substrate and an electrode and wire pattern on the substrate. The semiconductor device also has an anti-reflective layer on the substrate which presents a variation in the composition of a constituent element along the film thickness over the semiconductor substrate. The anti-reflective layer is selected from the group consisting of SiO.sub.x, SiN.sub.x and Si.sub.x O.sub.y N.sub.z.

Semiconductor device in which an anti-reflective layer is formed by

A method for producing a semiconductor device in which dry etching properties are rendered compatible with satisfactory anti-reflection characteristics in far-infrared lithography. An anti-reflective layer 6 is made up of a lower anti-reflective layer 6.sub.L of SiO.sub.X having a relatively low Si ratio and an upper anti-reflective layer 6.sub.H of SiO.sub.X having a relatively high Si ratio. After forming a resist pattern 7, the upper anti-reflective layer 6.sub.H and the lower anti-reflective layer 6.sub.U are etched using the etching conditions for Si and those for SiO.sub.X, respectively. Such variation in the Si ratio along the film thickness is realized by controlling the CVD film-forming conditions or Si.sup.+ ion implantation. Since the upper anti-reflective layer 6.sub.H has a refractive index higher than that of the lower anti-reflective layer 6.sub.L of SiO.sub.X, the standing wave suppression effect is improved. Since the films 6.sub.U, 6.sub.L are etched under respective optimum conditions, shape anisotropy may be realized. Film formation is not difficult to achieve because the elementary composition of the anti-reflective layer 6 on the whole is uniform.

Method for forming a semiconductor device in which an anti reflective

A multilayer resist pattern forming method patterns a lower resist layer formed over the stepped surface of a workpiece by a high-speed, highly anisotropic ion mode etching using an intermediate pattern formed by etching an intermediate layer formed by a high-density plasma CVD process as a substantial etching mask. The intermediate layer formed by the high-density plasma CVD process has a dense film quality and highly resistant to ion bombardment. Therefore, the intermediate resist pattern is neither thinned nor contracted and, consequently, the lower resist pattern can be formed precisely in conformity with the design rule. Since the high-density plasma promotes interaction between source gases to enable the intermediate layer to be formed at a comparatively low processing temperature, which prevents damaging the lower resist layer by heat.

Multilayer resist pattern forming method

A selecting anisotropic etching method for a GaAs/AlGaAs stacked system is disclosed. In a process for forming a recess for an HEMT gate, an n.sup.+ --GaAs layer on an n.sup.+ --AlGaAs layer is etched using a COS (carbonyl sulfide) /SF.sub.6 / CL.sub.2 mixed gas. The etching proceeds with radicals F.sup.* and Cl.sup.* as main etchants. On the other hand, carbonyl groups and C-O linkages derived from COS are introduced into a sputtered product of the resist mask for producing a carbonaceous polymer having a tough structure. The carbonaceous polymer forms a sidewall protective layer in conjunction with sulphur yielded from COS to contribute to anisotropic etching. It is possible with the present method to diminish the amount of the carbonaceous polymer necessary for procuring anisotropy to assure high selectivity, low pollution and low damage process.

Dry etching method

A method in which in case different kinds of processing are consecutively conducted in a single chamber of a plasma device, a residual portion of a processing gas used in one process is prevented from affecting a next process, is disclosed. A chemical species resulting from the processing gas in one process is prevented from being generated in forming a plasma in the next processing, by introducing an inactive gas after the processing gas used in one processing is exhausted once, or by introducing the inactive gas while exhausting the processing gas, or by cyclically repeating exhaust of the processing gas and introduction of the inactive gas, prior to the next process. The degree of exhaust may be monitored on the basis of an emission spectrum of the plasma. If the exhaust is carried out between a dry etching process conducted while holding a substrate on a single electrode electrostatic chuck and a process of removing residual charge of the chuck in a state of non-bias application to the substrate, or between a just etching process and an over etching process, deterioration of an etching shape due to radicals in the plasma may be prevented.

Method of producing semiconductor device

A dry etching method for anisotropically etching a polycide film without using chlorofluorocarbon (CFC). For instance, in a W polycide gate electrode forming process, a W polycide film is etched by using sulfur fluorides, like S.sub.2 F.sub.2, with a high S/F ratio (i.e. the ratio of the number of sulfur atoms to that of fluorine atoms). In a first step, at least the upper WSi.sub.x layer of the W polycide film is etched with the wafer kept at temperatures between -20.degree. C. and room temperature or with non-depositional fluorine based compounds like SF.sub.6 added to etching gas, thus decreasing the S/F ratio of the etching system. This first step promotes elimination of WF.sub.x and reduces the quantity of free sulfur. Therefore, WF.sub.x is inhibited from reacting with sulfur to form WS.sub.x for deposition in excessive quantities on the sidewalls of the WSi.sub.x pattern, thus preventing occurrence of critical dimension losses between the resist mask and the W polycide gate electrode. In a second step, the lower polysilicon layer of the W polycide film is etched with the wafer cooled to lower temperatures or with H.sub.2 S, etc. added to etching gas, thus increasing the S/F ratio of the etching system. This second step promotes deposition of sulfur on the sidewalls of the polycide pattern and improves anisotropy.

Dry etching method for W polycide using sulfur deposition

A method of producing a semiconductor device whereby it is possible to carry out anisotropic dry etching of a contact hole without generating dimensional losses even though a resist pattern has an inversely tapered cross-sectional shape. If the resist pattern is formed by using a chemical amplification negative resist material which is expected to be applied to excimer laser lithography, the resist pattern tends to have an inversely tapered cross-sectional shape due to resolution mechanism thereof. Thus, a hydrogen-enriched layer is formed in advance on a surface of a silicon oxide interlayer insulation film, and hydrogen released during etching is utilized for promoting deposition of carbonaceous polymer which is an etching reaction product. The carbonaceous polymer is deposited on a sidewall surface of the resist pattern and corrects an apparent cross-sectional shape into a vertical wall state. Therefore, diffusion of incident ion on an edge portion of the resist pattern can be prevented. The hydrogen-enriched layer can be formed, either by depositing silicon oxide, silicon nitride, amorphous silicon and the like in a CVD method, or by ion implantation of hydrogen into the silicon oxide interlayer insulation film.

Method of producing semiconductor device using a hydrogen-enriched layer

A dry etching method for performing anisotropic etching of a layer of a silicon based material without using a chlorofluorocarbon gas, is proposed. Sulfur halides yielding free sulfur (S) into a plasma under conditions of dissociation by electrical discharge, such as S.sub.2 F.sub.2 or S.sub.2 Cl.sub.2, are used as main components of the etching gas. This S is used for sidewall protection and for improving selectivity during etching, and is removed by sublimation by heating the wafer after etching. Although etching may be achieved by S.sub.2 F.sub.2 alone, suitable measures may preferably be used to increase the S/X ratio of an etching reaction system, which is a ratio of the number of atoms of S to that of X or a halogen, because the layer of the silicon based material is highly susceptible to halogen radicals. Specifically, optimum results may be obtained by (a) adding H.sub.2, H.sub.2 S or SiH.sub.4 to the etching gas, (b) introducing hydrogen in advance into an area for etching by ion implantation, (c) using a silicon-containing resist mask, or (d) by coating the surface of a wafer cover with an amorphous silicon layer.

A dry etching method for silicon trench etching in which high anisotropy, high etchrate and low pollution may be achieved simultaneously. A single crystal silicon substrate is etched using a gas mixture of S.sub.2 Cl.sub.2 and S.sub.2 F.sub.2 while a wafer is cooled to about -70.degree. C. Etching proceeds by a mechanism in which a radical reaction by Cl* derived from S.sub.2 Cl.sub.2 and F* derived from S.sub.2 F.sub.2 is assisted by the incident energy of S.sup.+, SF.sup.+, SCl.sup.+ or Cl.sup.+ ions. The highly reactive F* radicals of a small atomic radius contribute to increasing the etchrate. Deposition of sulfur yielded from S.sub.2 Cl.sub.2 and S.sub.2 F.sub.2 provides for efficient sidewall protection to achieve high anisotropy. The conventional practice to add fluorine based gases with a view to increasing the etchrate is in need of an excess quantity of a deposition material to give rise to increased pollution by particles. There is no risk of pollution with the sulfur deposit according to the present invention because the sulfur deposit may easily be sublimed off by heating the wafer.

Growing community of inventors

Kanagawa, Japan

Tetsuji Nagayama