Fujitsu Corporation

Fujitsu Semiconductor Limited

Fujitsu Vlsi Limited

Tetsuhiko Endoh

Yoshihiro Takemae

Toshio Ogawa

Yoshiharu Kato

Yoshinori Okajima

Ryuji Tanaka

Hiroaki Watanabe

Masaki Kirinaka

Hirosuke Komyoji

Masaru Masuyama

Katsuhiko Itakura

A volatile memory has a volatile additional area for storing an error correction code for a nonvolatile memory. Data stored in the nonvolatile memory are transferred to the volatile memory together with the error correction code without making an error correction. Thus, data transfer time from the nonvolatile memory to the volatile memory can be shortened. As a result, it is possible to shorten the time from beginning of the data transfer from the nonvolatile memory to the volatile memory to a point at which data becomes accessible.

Memory system including nonvolatile memory and volatile memory and operating method of same

Plural transmitter units generate plural currents corresponding to plural logical values, respectively, and propagate the currents to a common signal line. The common signal line synthesizes the currents generated by the transmitter units, and propagates them to a receiver unit as a synthetic current. The receiver unit restores the logical values the transmitter units generated, in accordance with the synthetic current. The values of the currents the transmitter units generate in correspondence with the logical values each differ, so that the value of the synthetic current can be changed for every combination of logical values. Accordingly, the receiver unit can restore the logical values outputted from the respective transmitter units, based on the synthetic current. That is, employing the common signal line enables signals transmitted from the transmitter units to be simultaneously received. Consequently, the number of signal lines laid between the transmitter units and the receiver unit is reduced.

Signal interface

An interface between a card-type peripheral device and a host machine, such as a PC, determines the operational supply voltage required to operate the peripheral device prior to the host machine supplying the operational supply voltage to the peripheral device. The host machine first receives information stored on the peripheral device specifying the operational voltage required to operate the peripheral device. The host machine then generates the proper operational supply voltage and provides it to the peripheral device. The interface prevents damage to the peripheral device due to the host machine supplying an incorrect operational voltage.

Host machine interface for reading information stored in peripheral card

A memory card is used on a card write and/or read apparatus which has a data bus with an arbitrary bit width and writes and/or reads a datum to and/or from the memory card. The memory card comprises a data input/output terminal, a memory part having a data bus with a bit width of at least n bits for coupling to the data bus of the card write and/or read apparatus via the data input/output terminal, an address input terminal for receiving an address signal, a first input terminal for receiving a first chip select signal which selects a first byte, a second input terminal for receiving a second chip select signal which selects a second byte, and a decoder circuit for determining a bit width of the data bus of the memory part to be used for data communication between the card write and/or read apparatus to one of n bits and n/N bits based on the first and second chip select signals and one or a plurality of arbitrary bits of the address signal by supplying control signals to the memory part, where n, N and n/N are positive integers.

Memory card

Growing community of inventors

Kawasaki, Japan

Tetsuhiko Endoh