Kabushiki Kaisha Toshiba

Teruyuki Matsuoka

Toshihiko Kitazume

Yukio Ishikawa

Fuying Yang

Tsuyoshi Ukyo

Tsuyoshi Ukyou

According to one embodiment, an error correction device includes a syndrome processing unit, a generation unit, and a search processing unit. The syndrome processing unit generates a syndrome value based on received data. The generation unit generates t (t is a maximum number of correctable bits) coefficient values of an error position polynomial based on the syndrome value. The search processing unit calculates a root of the error position polynomial, with a concurrency of computation being equal to or greater than '2', by using the coefficient values of the error position polynomial, when a number of error bits is not more than a predetermined value s (1&#x3c;=s&#x3c;t). The search processing unit calculates the root of the error position polynomial, with a concurrency of computation being '1', when the number of error bits exceeds the predetermined value s.

Error correction device and error correction method

According to one embodiment, an error detecting device includes a syndrome processor, an error locator polynomial generator, and a search processor. The syndrome processor is configured to generate syndrome values based on received data. The error locator polynomial generator is configured to generate coefficients for an error locator polynomial based on the syndrome values. The search processor configured to detect an error location by calculating a root of the error locator polynomial. The search processor has a clock controller, a buffer, a polynomial generator, and a first judging module. The clock controller is configured to output or stop a clock signal according to at least one of the coefficients. The buffer is configured to drive the clock signal outputted form the clock controller. The polynomial generator is configured to calculate a part of the error locator polynomial in synchronization with the clock signal driven by the buffer.

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Yokohama, Japan

Teruyuki Matsuoka