Tdk Corporation

Teruo Shimada

Yuji Kakinuma

Hiroya Kitagawa

A flash memory system including a memory manager. The memory manager manages data transmission and reception between a host computer and a flash memory. The memory manager mutually converts a logical address in which the flash memory is accessible from the host computer, and a physical address has an actual address of the flash memory. It stores a change of internal information as &Dgr; record in said flash memory and after resetting, restores an internal state to a state before the resetting by information of the &Dgr; record. The flash memory system can be realized in which the delay of the writing/reading time can be decreased, or writing operation can be relatively easily performed, high speed operation is possible and defective sectors, defective bits and the like can be adequately managed.

Flash memory system for restoring an internal memory after a reset event

A flash memory system of the present invention comprises a memory manager for managing data transmission/reception between a host computer and a flash memory, said memory manager having an address conversion table for converting a logical address given to the flash memory from the host computer and a physical address as an actual address of the flash memory, said address conversion table being defined in accordance with minimum erasing units of the flash memory. This can realize a flash memory system which has little delay in a writing/reading time, enables a high-speed operation, and can adequately manage defective sectors, defective bits, and the like.

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Tokyo, Japan

Teruo Shimada