Micron Technology Incorporated

Terry M Cronin

Joseph M Jeddeloh

James W Meyer

Kevin R Duncan

A command from a host is received via a port of a storage system. The port is assigned a current port revision identifier. The current port revision identifier of the port is associated with the command. Responsive to a status change associated with the port, an updated port revision identifier is assigned to the port to replace the current port revision identifier of the port and execution of the command is aborted responsive to determining that the current port revision identifier associated with the command is different than the updated port revision identifier of the port.

Command processing for a storage system

The present disclosure includes apparatus (e.g., computing systems, memory systems, controllers, etc.) and methods for providing data integrity. One or more methods can include, for example: receiving a number of sectors of data to be written to a number of memory devices; appending first metadata corresponding to the number of sectors and including first integrity data to the number of sectors, the first metadata has a particular format; generating second integrity data to be provided in second metadata, the second integrity data corresponding to at least one of the number of sectors (wherein the second metadata has a second format); and generating third integrity data to be provided in the second metadata, the third integrity data including error data corresponding to the second integrity data and the at least one of the number of sectors.

Apparatus and methods for providing data integrity

BIOS instructions are transferred from a BIOS ROM to a processor for either execution or storage in a system memory. The BIOS ROM has an address bus coupled to an address bus of the processor and a data bus coupled to the an intelligent drive electronics (&ldquo;IDE&rdquo;) controller through the data bus portion of an IDE bus. In operation, the processor applies addresses directly to the address bus of the BIOS ROM, and the corresponding instructions are coupled through the IDE data bus and the system controller to the data bus of the processor.

Method of initializing a processor and computer system

A system transfers BIOS instructions from a BIOS ROM to a processor for either execution or storage in a system memory. The BIOS ROM has an address bus coupled to an address bus of the processor and a data bus coupled to the an intelligent drive electronics (&ldquo;IDE&rdquo;) controller through the data bus portion of an IDE bus. In operation, the processor applies addresses directly to the address bus of the BIOS ROM, and the corresponding instructions are coupled through the IDE data bus and the system controller to the data bus of the processor.

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Ham Lake, MN, United States of America

Terry M Cronin