Intel Corporation

Micron Technology Incorporated

Terry Lee Sterrett

Richard J Harries

Devendra Natekar

Saikumar Jayaraman

Paul A Koning

Tian-An Chen

Tim T Chen

Johanna M Swan

Debendra Mallik

Rahul N Manepalli

Leonel R Arana

Kinya Ichikawa

Vassoudevane Lebonheur

Tian An Chen

Methods and designs for increasing interconnect areas for interconnect bumps are disclosed. An interconnect bump may be formed on a substrate such that the interconnect bump extends beyond a contact pad onto a substrate. An interconnect bump may be formed on a larger contact pad, the bump having a large diameter.

Interconnection designs and materials having improved strength and fatigue life

A method for low temperature bumping is disclosed. A resin capable of being cross-linked by free-radical or cationic polymerization at low temperature is provided. Electrically conductive particles are then added to the resin to form a mixture. The mixture is then activated by heat or exposure to light to polymerize the mixture. In an alternative embodiment, a vinyl ether resin is used, to which electrically conductive particles are added. The mixture is polymerized by exposure to light.

Low temperature bumping process

In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer. In one embodiment, the interposerincludes columnar interconnects which may be fabricated by etching a conductive member such as copper foil, for example. In one application, the pitch or center to center spacing of the columnar interconnects may be defined by masking techniques to provide an interconnect pitch suitable for a particular application. In yet another aspect, etching rates may be controlled to provide height to width aspect ratios of the columnar interconnects which are suitable for various applications.

Etched interposer for integrated circuit devices

A method for connecting electronic components, such as, an integrated circuit die and a package substrate, is described. According to one aspect of the invention, a contact pad protective material is applied on one or more of the contact pads on an integrated circuit die. The underfill material is applied to the surface of the die not covered by the contact pad protective material and the underfill material is partially cured in a curing oven. The contact pad material is removed leaving openings over the respective surface of the contact pad. A one or more contacts on a package substrate is inserted into the openings, electronically connecting the contacts to the contact pads.

Wafer-level underfill process making use of sacrificial contact pad protective material

A system may include an integrated circuit die, an integrated circuit package coupled to the integrated circuit die, mold compound in contact with the integrated circuit die and the integrated circuit package, and an interconnect coupled to the integrated circuit package. A first portion of the interconnect may be in contact with the mold compound, a second portion of the interconnect might not contact the mold compound, and a third portion of the interconnect may be in contact with the integrated circuit package.

Stackable integrated circuit packaging

Electronic device support and processing methods are described. One embodiment includes a method of processing an electronic device including solder bumps extending therefrom. The method includes providing at least one fluid selected from the group consisting of electrorheological fluids and magnorheological fluids on a support structure. The solder bumps extending from the electronic device are positioned in the fluid. The fluid is activated by applying a field selected from the group consisting of an electric field and a magnetic field to the fluid. The activated fluid mechanically holds the electronic device in place. A surface of the electronic device is polished while the electronic device is held in place by the activated fluid. The fluid is deactivated by removing the applied field from the fluid, and the electronic device is separated from the deactivated fluid. Other embodiments are described and claimed.

Methods and devices for supporting substrates using fluids

A method and apparatus provides increased operative life for flip-chip devices that are produced from an integrated circuit formed with electrically conductive bumps bonded to a printed circuit board substrate. The bumps and the substrate are formed from similar materials that allow control of the degree of latency for each element and produce a covalently bonded laminate structure when the bumps and substrate are brought together. The covalently bonded structure decreases bump fatigue to lengthen the operative life of the flip-chip device.

Method and apparatus for improving an integrated circuit device

Embodiments of the methods of the present invention provide a Molded Matrix Array Package (MMAP) carrier substrate panel that prevents underfill wetting in the inter-die areas. Surface treatments are provided via plasmas and/or patterned chemical depositions that reduce the surface free energy of the inter-die area to below the surface free energy of the underfill material. The surface treatments prevent the underfill material from wetting the carrier substrate panel and therefore encroachment upon the inter-die area. This provides a underfill material-free inter-die area allowing adhesion between the mold compound and carrier substrate.

Growing community of inventors

Cave Creek, AZ, United States of America

Terry Lee Sterrett