Intel Corporation

Terrence Trausch

Uri V Cummings

Daniel Daly

Andrew Alduino

Donald L Faw

Christopher Neil Bradley

Xiang Sean Zhou

Xiao Liang Hu

Zhiming Li

Jie Gandalf Yan

Guy L Williams

Gabriel C Cox

Robert Pebly

Xingping Ruan

James T Langston, Jr

A system includes a host processor () and a peripheral device (). The host processor () is coupled to the peripheral device () by a Peripheral Component Interconnect Express (PCIe) compliant link. The peripheral device () can include logic circuitry to identify, based on an application using the device and the host processor (), a read to write ratio utilized by the application; and provide the read to write ratio to the host processor (). The host processor () comprising logic circuitry to send a command signal to a device in communication with the hardware processor across a peripheral component interconnect express (PCIe) compliant link, the command signal indicating a transmission (TX) lane to receive (RX) lane ratio, the TX lane to RX lane ratio corresponding to the read to write ratio identified by the peripheral device (); and receive an indication that the device is capable of supporting asymmetric TX and RX ratios.

Asymmetric transmission (TX) and receive (RX) lanes in a point-to-point interconnect using a peripheral component interconnect express (PCIE) resources in a computer system

An apparatus for compute module management is described herein. The apparatus includes a host system and a logic solution. The host system includes a central processing unit and a plurality of sensors that collect system management data from multiple interfaces. The logic solution consolidates the system management data to a single format for a single interface and transmits the system management data to a central authority. The central authority includes system management firmware for managing each compute module using the consolidated system management data.

Single microcontroller based management of multiple compute nodes

Embodiments of the present disclosure provide techniques and configurations for a rack assembly. In one embodiment, a tray to be disposed in a rack assembly may comprise a plurality of sleds with individual sleds including one or more compute nodes; and a networking element coupled with a sled of the plurality of sleds and configured to communicatively connect the sled to one or more other components of the rack assembly via an optical communication system. The optical communication system may include an external optical cable configured to communicatively connect the networking element with the rack assembly. Other embodiments may be described and/or claimed.

Rack assembly structure

Embodiments of the present disclosure provide arrangements for aggregating network traffic of compute nodes of various computing sleds of computing trays of a computing rack assembly in a data center. In one embodiment, a computing rack assembly may include a plurality of computing trays. A computing tray may removably include a number of sleds. Each sled may include a number of compute nodes. The computing tray may further include an optical network aggregation component to aggregate network traffic of the compute nodes of various sleds of a computing tray. Other embodiments may be described and/or claimed.

Network aggregation in a computing shelf/tray

Growing community of inventors

Portland, OR, United States of America

Terrence Trausch