Hewlett-Packard Development Company, L.p.

Samsung Electronics Co., Ltd.

Terrel Munden

Sarah Morris Brandenberger

Kenneth Kay Smith

Frederick A Perner

Robert Matthew Sesek

David H McIntyre

David Murray Banks

Stewart R Wyatt

Jonathan Jedwab

James Andrew Davis

Connie Lemus

Dave McIntyre

Embodiments of the present invention provide a magnetic memory. In one embodiment, the magnetic memory comprises an array of memory cells and a control circuit. The control circuit is configured to receive data, sort the received data to obtain unchanged data and ECC encoded data, and store the unchanged data and the ECC encoded data in the array of memory cells.

Magnetic memory devices having selective error encoding capability based on fault probabilities

A memory storage device having an address control system is disclosed. The memory storage device includes memory cells and an address control system configured to decode a bit number which identifies a number of the memory cells which are selected in parallel. The memory cells selected in parallel correspond to least significant bits of an address which has a range that includes the memory cells.

Address control system for a memory storage device

A system for configuring solid-state storage devices comprises a solid-state storage device and an error correction code (ECC) selection system. The ECC selection system is configured to automatically select a set of error correction code based on an error rate of the storage device. The ECC selection system is further configured to install the selected set of error correction code in the solid-state storage device.

System and method for configuring a solid-state storage device with error correction coding

Exemplar embodiments are disclosed which allow errors in a magnetoresistive solid-state storage device, such as a magnetic random access memory (MRAM) device, to be minimized. An illustrative method includes the steps of identifying cells in the device which have a failure mode characterized by a propensity to remain in a particular orientation of magnetization, mapping the location of the identified cells, and compensating for the failure mode of a cell at a mapped location. Systems and computer readable media are also provided.

Minimizing errors in a magnetoresistive solid-state storage device

Systems and methods for reducing the effect of noise while reading data from memory, are provided. One system embodiment includes a memory cell that stores a first data; multiple sensing devices that receive the first data and provide a first set of outputs; and a voting system that evaluates the first set of outputs to determine whether one of the outputs of the first set is valid data from the memory cell. One method embodiment includes reading data in parallel that is stored in a memory cell to provide outputs; and evaluating the outputs to determine whether one of the outputs is valid data from the memory cell.

Systems and methods for reducing the effect of noise while reading data from memory

A memory housing is provided comprising at least one memory device positioned within the housing, the at least one memory device having a performance parameter responsive to an environmental condition, and an environmental maintaining device for non-ambiently changing an environmental condition within the memory housing to cause the performance parameter of the at least one memory device to meet a criteria.

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Boise, ID, United States of America

Terrel Munden