Raytheon Company

Terence J McKiernan

Harry B Marr

John H Steele

Ray B Huffaker

Ryan D Retting

Danny D Nguyen

Daniel G Miller

Majid J Yaghoubi

Jeanine T Duong

David A Blaser

Ann E Inguanzo

Systems and methods described herein provide for testing and debugging different subsystems of an embedded controller using a testing architecture. The testing architecture can simulate messaging interfaces between internal subsystems of the embedded controller and external subsystems the controllers interacts with to integrate various types of software. A method includes generating test support models for one or more subsystems and establishing a communications network between the test support models and a control module of the embedded controller. A clock signal is generated to initiate processing within the testing architecture between the control module and the test support models. An event model is executed at the test support models using the clock signal and data is generated at one or more of the test support models responsive to the event model. The data can correspond to operational parameters of a respective system the embedded controller.

Systems and methods for testing an embedded controller

A system includes a first simulated processing system having a first clock and a second simulated processing system having a second clock. The first and second processing systems may operate asynchronously. A synchronization bridge may coordinate executing of the first synchronized processing system and the second synchronized processing system to synchronize the time of execution of the first and second simulated processing systems and messaging between the first and second processing systems. The first and second processing systems may be simulated processing systems.

Simulation system with clock and messaging synchronization

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Rancho Palos Verdes, CA, United States of America

Terence J McKiernan