Denso Corporation

Teppei Kawamoto

Ryotaro Miura

Tomomichi Mizoguchi

Yasutaka Senda

Nobuyoshi Osamura

An equalization device for equalizing voltages of battery cells connected in series includes equalization switches, resistors, and a control circuit. Each equalization switch has energization terminals interposed between terminals of a corresponding battery cell. A current path between the energization terminals conducts when a control voltage not less than a threshold voltage is applied between control terminals of the equalization switch. Each resistor is connected between the control terminals of the corresponding equalization switch. The control circuit switches an equalization execution state and an equalization stop state in accordance with an equalization signal provided for each battery cell. In the execution state, the control circuit passes an electric current through the corresponding resistor to generate the control voltage not less than the threshold voltage. In the stop state, the control circuit causes the corresponding resistor to generate the control voltage less than the threshold voltage.

Equalization device for assembled battery

A load driver includes a switching element connected to a load, a constant current generator that generates a constant current, and a driver circuit that turns on the switching element for an on-period, which depends on a value of the constant current and is shortened with an increase in the value of the constant current. The constant current generator supplies a first constant current having a first current value to the driver circuit during the on-period, and supplies a second constant current having a second current value smaller than the first current value after the on-period has elapsed and the switching element reaches an on state.

Load driver with constant current variable structure

A gate driving circuit includes a gate control circuit and a gate voltage limit circuit. The gate control circuit establishes or breaks electrical continuity of a gate voltage supply path from a power source line to a gate terminal of a transistor in response to an on-command and an off-command. The gate voltage limit circuit limits a gate voltage of the transistor to be less than or equal to a first voltage in response to the on-command at least in a period until a determination of whether an electric current greater than a fault criterion value flows to the transistor ends and then limits the gate voltage to be less than or equal to a second voltage.

Growing community of inventors

Anjo, Japan

Teppei Kawamoto