Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Teppei Iwase

Yoshihiro Tomura

Kazuhiro Nobori

Kentaro Kumazawa

Yuichiro Yamada

Akihiro Ishikawa

Hiroaki Fujiwara

Toshihiko Wada

Yuji Yamamoto

Toru Okazaki

Kazunori Takada

Takashi Yui

Kiyomi Hagihara

Takashi Tsuruta

Shigeru Kondou

Keitaro Fujii

Nobuyuki Kamikihara

Tosihiko Wada

Koujiro Nakamura

Masaki Okamoto

Yuta Moriyama

Manabu Kakino

Tomoaki Kuroishi

A mold includes a rugged pattern layer, an inorganic sheet layer, and an elastic sheet layer. The inorganic sheet layer is formed of an inorganic material and supports the rugged pattern layer. The elastic sheet layer supports the inorganic sheet layer.

Mold, imprint device, and imprint method

A film structural member includes a recessed portion on a transparent substrate, metal wiring on a base of the recessed portion, and a particle layer on the metal wiring. The particle layer is configured as an aggregate of particles having an average particle diameter of 300 nm or smaller.

Film structural member

An imprinting method includes a resin application process of applying a light curing resin so that the resin covers a surface of the substrate and protrudes from an outer periphery of the substrate to contact an adhesive sheet in a state where a reverse surface of the substrate is adhered to the adhesive sheet, an advance curing process of curing the light curing resin contacting the adhesive sheet by irradiating the substrate with light from the reverse surface side, a pressurizing process of pressing a fine pattern formed in a mold onto the light curing resin on the surface of the substrate, a curing process of curing the light curing resin on the surface of the substrate by irradiating the substrate with light from the surface side and a mold releasing process of releasing the mold from the light curing resin by performing peeling from a portion cured on the adhesive sheet.

Imprinting method and imprinting device

An imprinting device capable of realizing uniform transfer regardless of the thickness of a substrate includes a stage having a placement area for placing a substrate to which a transferred object is applied, a thin-plate mold with flexibility having a fine pattern on a first surface facing the placement area of the stage, which is held with a predetermined tension and a pressing roll which can press a second surface opposite to the first surface of the mold, in which the stage has plural adsorption holes around the placement area, and the adsorption holes start adsorption in synchronization with movement of the pressing roll.

Imprinting device

A semiconductor device includes: a first semiconductor chip having a surface provided with first electrodes; and an expanded semiconductor chip including a second semiconductor chip and an expanded portion extending outward from at least one side surface of the second semiconductor chip. The expanded semiconductor chip has a surface provided with second electrodes. The surface of the first semiconductor chip provided with the first electrodes faces the surface of the expanded semiconductor chip provided with the second electrodes so that the first electrodes are connected to the second electrodes. Each one of the second electrodes that is connected to an associated one of the first electrodes is located only on the expanded portion.

Expanded semiconductor chip and semiconductor device

A semiconductor device includes a first semiconductor chip; an extension formed at a side surface of the first semiconductor chip; a connection terminal formed on the first semiconductor chip; a re-distribution part formed over the first semiconductor chip and the extension and including an interconnect connected to the connection terminal and an insulating layer covering the interconnect; and an electrode formed above the extension on a surface of the re-distribution part and connected to the interconnect at an opening of the insulating layer. The electrode is mainly made of a material having an elastic modulus higher than that of the interconnect. The electrode includes a bonding region where the electrode is bonded to the interconnect at the opening, and an outer region closer to an end part of the extension. The interconnect is formed so as not to continuously extend to a position right below the outer region.

Semiconductor device

While bumps formed on pads of a semiconductor chip and a board having a sheet-like seal-bonding resin stuck on its surface are set face to face, the bumps and the board are pressed to each other with a tool, thereby forming a semiconductor chip mounted structure in which the seal-bonding resin is filled between the semiconductor chip and the board and in which the pads of the semiconductor chip and the electrodes of the board are connected to each other via the bumps, respectively. Entire side faces at corner portions of the semiconductor chip are covered with the seal-bonding resin. Therefore, loads generated at the corner portions due to board flexures for thermal expansion and contraction differences among the individual members caused by heating and cooling during mounting as well as for mechanical loads after mounting so that internal breakdown of the semiconductor chip can be avoided.

Semiconductor device mounted structure and its manufacturing method, semiconductor device mounting method, and pressing tool

A semiconductor assembly includes a multilayer wiring board including at least three insulating layers, first, second and third insulating layers and a semiconductor device attached to one principal surface of the first insulating layer. The first, second and third insulating layers are stacked in this order. The multilayer wiring board further includes a heat-insulating member made of a material having a lower thermal conductivity than the insulating layers. The heat-insulating member is disposed between the first and second insulating layers or next to the first insulating layer at a side opposite to the one principal surface.

Semiconductor assembly and multilayer wiring board

In a semiconductor device mounted structure in which device electrodes of a semiconductor device and board electrodes of a board are connected to each other via bump electrodes, respectively, and in which a sealing-bonding resin is placed between the semiconductor device and the board, a void portion is placed at a position corresponding to an edge portion of the semiconductor device in the sealing-bonding resin. Thus, stress loads generated at corner portions of the semiconductor device due to board flexures for differences in thermal expansion and thermal contraction among the individual members caused by heating and cooling during mounting of the semiconductor device, as well as for mechanical loads after the mounting process, can be absorbed by the void portion and thereby reduced, so that breakdown of the semiconductor device mounted structure is prevented.

Semiconductor device mounted structure with an underfill sealing-bonding resin with voids

The present invention provides a semiconductor device of a double-side mounting structure including a circuit board and a plurality of semiconductor chips arranged and joined together on the opposite surfaces of the circuit board, wherein in an area in which the semiconductor chipmounted on the top surface of the circuit boardoverlaps with the semiconductor chipmounted on the bottom surface of the circuit board, a recess portion(or a protruding portion) is formed in the surfaces of the circuit board

In this semiconductor chip, a table electrodeis interposed between a bump electrodeand an electrode pad. The table electrodeis formed by forming a plurality of coreshaving a smaller Young's modulus than the bump electrode, on the electrode pad, and then covering the surfaces of the coreswith a conductive electrode. When the semiconductor chipis flip-chip mounted, the bump electrodeis plastically deformed and the table electrodeis elastically deformed appropriately, thereby obtaining a good conductive state.

Semiconductor chip and semiconductor device

In a mounting process simulation system and a method thereof in accordance with the present invention, the respective simulations of a mounting process having a plurality of sequential steps are analyzed on the basis of condition parameters, a single evaluation value is created on the basis of the analysis results, and when the evaluation value does not reach a target value, an approximate function is created on the basis of the analysis results, a tentative parameter is created, and optimization is carried out again.

Mounting process simulation system and method thereof

A method for analyzing a component mounting board comprising a step (A) for forming a multilayer substrate shell model of a multilayer wiring board, a step (B) for forming a multilayer component shell model divided by element division lines based on the bonding position of a component to the surface of the multilayer wiring board, step (C) for redividing the mounting position of the component in the multilayer substrate shell model, and step (D) for forming an analysis model by bonding the neutral plane of the substrate and the neutral plane of the component through one of a beam element and a solid element, i.e. a bonding element equivalent to mounting conditions of the component, wherein precision of analysis is enhanced while reducing computation cost by performing calculation while imparting boundary conditions to the analysis model.

Growing community of inventors

Hyogo, Japan

Teppei Iwase