Murata Manufacturing Co., Ltd.

Teemu Salo

Lasse Aaltonen

Tero Sillanpää

Vesa Törnqvist

The present invention relates to the field of digital memory, and in particular to a multiple-time programmable (MTP) memory employing error correction codes (ECC), the MTP memory being made up of one-time programmable (OTP) memory modules. Pointers to the memory address of currently in-use OTP memory blocks in use for each virtual MTP memory block are stored in OTP memory with an error correcting code. The pointers encode the memory addresses according to a scheme that ensure that only bit changes in a single direction are required in both the pointer data and the error correction code when the memory address is incremented.

Multiple time programmable memory using one time programmable memory and error correction codes

A capacitive sensor device includes capacitive elements for detecting at least two inertial channels. At least one of the inertial channels comprises at least two self-test tones with distinctive fundamental frequencies. Inertial signals in the at least two inertial channels are caused by change of capacitance in the capacitive elements due to movements of rotor masses. Self-test tones are fed into at least one capacitive element under control of a self-test control module and the at least two inertial channels are temporally multiplexed to allow feeding of the self-test tones during normal operation of the capacitive sensor device. Signals in the inertial channels are processed for extracting self-test signals corresponding to the self-test tones, and the self-test signals are analyzed for self-test purposes. Alarm is triggered if multiple consecutive samples of predefined set of self-test signals indicate error with same polarity.

Continuous self-test in capacitive sensor

The claims define a processing circuit for processing input signals from a capacitive transducer structure. A current-to-voltage converter receives two input signals from the capacitive transducer structure, and outputs two output signals to gain stage circuits, and to a reference voltage generator. The gain stages generate from the output voltage signals a differential output signal. The reference voltage generates from the output signals a common mode output signal. The processing circuit generates a digital signal that corresponds to a quotient of the differential output signal and the common mode output signal.

Capacitance processing circuit and a MEMS device

A delta-sigma analog-to-digital converter for use with multiplexed input channels. The delta-sigma analog-to-digital converter comprising at least one integrator that includes an operational amplifier, a memory element with a leakage preventing switch structure for each input channel and a reset switch element adapted to reset the operational amplifier between the input channels. The specific switch design prevents effectively channel to channel cross talk between multiplexed channels.

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Riihimäki, Finland

Teemu Salo