United Microelectronics Corp.

Ted Ming-Lang Guo

Chin-Cheng Chien

Chun-Yuan Wu

Shu-Yen Chan

Yu-Ren Wang

Chan-Lon Yang

Yu-Ying Lin

Chin-I Liao

Kuang-Hsiu Chen

Chueh-Yang Liu

Ling-Chun Chou

Tsung-Hung Chang

Chien-Ting Lin

Ssu-I Fu

Chih-Chien Liu

Shih-Hung Tsai

Chin-Fu Lin

Neng-Hui Yang

Chien-Liang Lin

Chun-Wei Yu

Chiu-Hsien Yeh

Shin-Chi Chen

Wen-Tai Chiang

Chih-Yueh Li

Yi-Liang Ye

Ying-Tsung Chen

Hsu Ting

Tsung-Hsun Tsai

Hsin-Kuo Hsu

Bo-Syuan Lee

Chi-Sheng Chen

Yu-Chin Cheng

An epitaxial process applying light illumination includes the following steps. A substrate is provided. A dry etching process and a wet etching process are performed to form a recess in the substrate, wherein an infrared light illuminates while the wet etching process is performed. An epitaxial structure is formed in the recess.

Epitaxial process applying light illumination

A method of an interfacial oxide layer formation comprises a plurality of steps. The step (S) is to remove a native oxide layer from a surface of a substrate; the step (S) is to form an oxide layer on a surface of a substrate by piranha solution (SPM); the step (S) is to cleaning a surface of the oxide layer by standard clean 1 (SC1), and the step (S) is to etch he oxide layer by a solution comprising diluted hydrogen fluoride (dHF) and ozonized pure water (DIO3).

Method of interfacial oxide layer formation in semiconductor device

A method for manufacturing semiconductor devices includes following steps. A substrate including a first gate structure and a second gate structure formed thereon is provided. The first gate structure and the second gate structure are complementary to each other. Next, a first mask layer covering the second gate structure is formed and followed by forming first recesses in the substrate at two respective sides of the first transistor. Then, forming the first recesses, a first epitaxial layer is formed in each first recess. After forming the first epitaxial layers, a local protecting cap is formed on the first epitaxial layers and followed by removing the first mask layer.

Method for manufacturing semiconductor devices comprising epitaxial layers

The present invention provides a method for forming a semiconductor structure, comprising: firstly, a substrate is provided, next, a first dry etching process is performed, to form a recess in the substrate. Afterwards, an ion implantation process is performed to a bottom surface of the recess, a wet etching process is then performed, to etch partial sidewalls of the recess, so as to form at least two tips on two sides of the recess respectively, and a second dry etching process is performed, to etch partial bottom surface of the recess, wherein after the second dry etching process is performed, a lower portion of the recess has a U-shaped cross section profile.

Manufacturing method for forming semiconductor structure

A cleaning process for oxide includes the following step. A substrate having a first area and a second area is provided. A first oxide layer is formed on the substrate of the first area and the second area. An ammonium hydroxide (NHOH) and hydrogen peroxide (HO) containing process is performed on the first oxide layer of the first area and the second area. A photoresist layer covers the first oxide layer of the first area while exposing the first oxide layer of the second area. The first oxide layer of the second area is removed. The photoresist layer is then removed.

Cleaning process for oxide

The present invention provides a semiconductor structure, which includes a substrate, at least two gate structures disposed on the substrate, a first recess, disposed in the substrate between two gate structures, the first recess having a U-shaped cross section profile, and a second recess, disposed on the first recess, the second recess having a polygonal shaped cross section profile, and has at least two tips on two sides of the second recess, the first recess and the second recess forming an epitaxial recess.

Semiconductor structure and manufacturing method thereof

A method of manufacturing a semiconductor device having a metal gate is provided. A substrate having a first conductive type transistor and a second conductive type transistor formed thereon is provided. The first conductive type transistor has a first trench and the second conductive type transistor has a second trench. A first work function layer is formed in the first trench. A hardening process is performed for the first work function layer. A softening process is performed for a portion of the first work function layer. A pull back step is performed to remove the portion of the first work function layer. A second work function layer is formed in the second trench. A low resistive metal layer is formed in the first trench and the second trench.

Method of manufacturing semiconductor device having metal gate

A method for removing silicon nitride material includes following steps. A substrate having at least a gate structure formed thereon is provided, and at least a silicon nitride hard mask is formed on top of the gate structure. A first removal is performed to remove a portion of the silicon nitride hard mask with a first phosphoric acid (HPO) solution. A second removal is subsequently performed to remove remnant silicon nitride hard mask with a second phosphoric acid solution. The first removal and the second removal are performed in-situ. A temperature of the second phosphoric acid solution is lower than a temperature of the first phosphoric acid solution.

Method for removing nitride material

A strained silicon channel semiconductor structure comprises a substrate having an upper surface, a gate structure formed on the upper surface, at least one recess formed in the substrate at lateral sides of the gate structure, wherein the recess has at least one sidewall which has an upper sidewall and a lower sidewall concaved in the direction to the gate structure, and the included angle between the upper sidewall and horizontal plane ranges between 54.5&#xb0;-90&#xb0;, and an epitaxial layer filled into the two recesses.

Strained silicon channel semiconductor structure

A semiconductor structure including a substrate and a gate structure disposed on the substrate is disclosed. The gate structure includes a gate dielectric layer disposed on the substrate, a gate material layer disposed on the gate dielectric layer and an outer spacer with a rectangular cross section. The top surface of the outer spacer is lower than the top surface of the gate material layer.

Semiconductor structure and method for slimming spacer

A method for fabricating a strained channel semiconductor structure includes providing a substrate, forming at least one gate structure on said substrate, performing an etching process to form two recesses in said substrate at opposites sides of said gate structure, the sidewall of said recess being concaved in the direction to said gate structure and forming an included angle with respect to horizontal plane, and performing a pre-bake process to modify the recess such that said included angle between the sidewall of said recess and the horizontal plane is increased.

Method of making strained silicon channel semiconductor structure

A method of forming fin structure in integrated circuit comprising the steps of forming a plurality of fin structures on a substrate, covering an insulating layer on said substrate, performing a planarization process to expose mask layers, performing a wet etching process to etch said insulating layer, thereby exposing a part of the sidewall of said mask layer, removing said mask layer, and performing a dry etching process to remove pad layer and a part of said insulating layer, thereby exposing the top surface and a part of sidewall of said fin structures.

Method of forming fin structures in integrated circuits

A method of fabricating a semiconductor structure, in which after an etching process is performed to form at least one recess within a semiconductor beside a gate structure, a thermal treatment is performed on the recess in a gas atmosphere including an inert gas before a silicon-containing epitaxial layer is formed in the recess through an epitaxy growth process.

Growing community of inventors

Tainan, Taiwan

Ted Ming-Lang Guo