E Ink Holdings Inc.

Prime View International Co. Ltd.

Ted-Hong Shinn

Chia-Chun Yeh

Yao-Chou Tsai

Fang-An Shu

Yi-Ching Wang

Wei-Chou Lan

Henry Wang

Wen-Chung Tang

Po-Wen Hsiao

Sung-Hui Huang

Yuan-Chih Tsai

Chin-Wen Lin

Wei-Tsung Chen

Tzu-Ming Wang

Cheng-Hang Hsu

Chi-Liang Wu

Chi-Ming Wu

Chih-Hsiang Yang

Xue-Hung Tsai

Po-Hsin Lin

Chuang-Chuang Tsai

Tzung-Wei Yu

Yu-Sheng Lin

Chih-Hsuan Wang

Lee-Tyng Chen

Jui-Chung Cheng

Su-Cheng Liu

Hsing-Yi Wu

Chuan-I Huang

Hung-Pin Su

Kai-Cheng Chuang

Kuan-Yi Lin

Hsiang-Tang Wang

Chih-Cheng Wang

Ming-Sheng Chiang

Chuan-Feng Liu

Jen-Shiun Huang

Yung-Sheng Chang

Wan-Tien Chen

Chen-Lung Lo

Chung-Chin Huang

Young-Ran Chuang

Yao Peng

Chin-Wei Lin

Chi-Sheng Jiang

Yi-Ming Chiu

Fang An Shu

Yuan-Chih Tasi

Chi-Tsan Shen

Tung-Ying Shiue

Wen-Shin Liu

A thin film transistor (TFT) structure includes a metal oxide semiconductor layer, a gate, a source, a drain, a gate insulation layer, and a passivation layer. The metal oxide semiconductor layer has a crystalline surface which is constituted by a plurality of grains separated from one another. An indium content of the grains accounts for at least 50% of all metal elementsof the crystalline surfaceof the metal oxide semiconductor layer. The gate is disposed on one side of the metal oxide semiconductor layer. The source and the drain are disposed on the other side of the metal oxide semiconductor layer. The gate insulation layer is disposed between the gate and the metal oxide semiconductor layer. The passivation layer is disposed on the gate insulation layer, and the crystalline surface of the metal oxide semiconductor layer is in direct contact with the gate insulation layer or the passivation layer.

Thin film transistor structure and method for manufacturing the same

A display panel having a wireless charging function is provided, and the display panel includes a first substrate, an induction coil layer, a display pixel layer, and a second substrate. The induction coil layer is disposed on the first substrate. The induction coil layer includes at least one induction coil. The induction coil layer is adapted for collaborating with a wireless charging power supply, such that the induction coil layer executes the wireless charging function. The display pixel layer is disposed on the induction coil layer. The second substrate is disposed on the display pixel layer.

Display panel with coil layer for wireless charging

Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.

Array substrate and method for manufacturing the same

A metal oxide semiconductor structure, the structure including: a substrate; a gate electrode, deposited on the substrate; a gate insulation layer, deposited over the gate electrode and the substrate; an IGZO layer, deposited on the gate insulation layer and functioning as a channel; a source electrode, deposited on the gate insulation layer and being at one side of the IGZO layer; a drain electrode, deposited on the gate insulation layer and being at another side of the IGZO layer; a first passivation layer, deposited over the source electrode, the IGZO layer, and the drain electrode; a second passivation layer, deposited over the first passivation layer; and an opaque resin layer, deposited over the source electrode, the second passivation layer, and the drain electrode.

Metal oxide semiconductor structure

A vertical transistor and a manufacturing method thereof are provided herein. The manufacturing method includes forming a first patterned conductive layer on a substrate; forming a patterned metal oxide layer on the first patterned conductive layer, in which the patterned metal oxide layer includes a first patterned insulator layer, a second patterned insulator layer, and a second patterned conductive layer; forming a semiconductor layer; and forming a third patterned conductive layer. The first patterned insulator layer, the second patterned insulator layer, and the second patterned conductive layer are made by using a single metal oxide material. The oxygen concentration of the second patterned conductive layer is different from the oxygen concentrations of the first patterned insulator layer and the second patterned insulator layer.

Vertical transistor and manufacturing method thereof

An organic light-emitting diode display device includes a substrate, a light-absorption layer, an active array structure, and an organic light-emitting diode. The substrate has a first and a second surface opposite to each other. The light-absorption layer is disposed on the first surface, and has at least one opening exposing a portion of the first surface. The active array structure is positioned on the second surface, and includes at least one data line, at least one gate line, and at least one switching device electrically connected to the gate and data lines. The light-absorption layer overlaps at least one of the data line and the gate line when viewed in a direction perpendicular to the substrate. The organic light-emitting diode is electrically connected to the switching device, and the organic light-emitting diode overlaps the opening when viewed in the direction perpendicular to the substrate.

Organic light-emitting diode display device and method of manufacturing the same

A thin file transistor includes a gate electrode, a source electrode, a drain electrode, a gate-insulating layer, and an oxide semiconductor layer. The oxide semiconductor layer includes indium-gallium-zinc oxide with a formula of InGaZnO, in which x, y and z satisfy the following formulas 1.5&#x2266;(y/x)&#x2266;2 and 1.5&#x2266;(y/z)&#x2266;2. The gate-insulating layer is positioned between the gate electrode and the oxide semiconductor layer. The source electrode and the drain electrode are respectively connected to two different sides of the oxide semiconductor layer.

Thin film transistor

A semiconductor structure includes a top gate, an oxide semiconductor channel layer, a first dielectric layer, a second dielectric layer, a source and a drain. The oxide semiconductor channel layer is disposed between the top gate and a substrate. The first dielectric layer is disposed between the top gate and the oxide semiconductor channel layer. The second dielectric layer is disposed between the first dielectric layer and the oxide semiconductor channel layer. The source and the drain are disposed on two opposite sides of the oxide semiconductor channel layer and located between the first dielectric layer and the substrate. A portion of the oxide semiconductor channel layer is exposed between the source and the drain. A portion of the first dielectric layer and a portion of the second dielectric layer directly contact with and entirely cover the portion of the oxide semiconductor channel layer.

Semiconductor structure

A thin film transistor is disclosed. The drain and source electrode layer of the thin film transistor is disposed on the substrate, in which the drain and source electrode layer is divided into a drain region and a source region. The semiconductor layer and the first insulating layer are disposed on the drain and source electrode layer, in which the first insulating layer has an upper limit of thickness. The second insulating layer is disposed on the semiconductor layer and the first insulating layer, in which the second insulating layer has a lower limit of thickness. The gate electrode layer is disposed on the second insulating layer. The passivation layer is disposed on the gate electrode layer, and the pixel electrode layer is disposed on the passivation layer.

Thin film transistor and method for manufacturing thin film transistor

A capacitor structure of capacitive touch panel including a first electrode layer, a first material layer, a second material layer and a second electrode layer is provided. The first material layer is disposed on the first electrode layer, and the material of the first material layer is selected from one of a semiconductor material and an insulating material. The second material layer is disposed on the first material layer, and the material of the second material layer is selected from another one of the semiconductor material and the insulating material. The second electrode layer is disposed on the second material layer.

Capacitor structure of capacitive touch panel

A threshold voltage sensing circuit applied in a display panel includes a first sensor and a second sensor. The first sensor positioned in the display panel receives an operation signal at a regular time point after start-up and continuously receives multiple driving signals which are the same as those received by the pixel circuits of the display panel and outputs a first output voltage accordingly. The second sensor positioned in the display panel receives the driving signals at a regular time point after start-up and outputs a second output voltage accordingly. When the voltage difference between the first output voltage and the second output voltage is beyond a variation standard, the low level of the gate voltage of the pixel circuit is adjusted.

Flat panel display, threshold voltage sensing circuit, and method for sensing threshold voltage

A reflective display device includes a drive array substrate, an electrophoretic display film, a reflective optical film and a light source module. The electrophoretic display film is disposed on the drive array substrate and includes a plurality of display mediums. The reflective optical film is disposed on the electrophoretic display film. The light source module is disposed beside the reflective optical film. A light emitting from the light source module is reflected to the electrophoretic display film by the reflective optical film. The light source module includes a plurality of first-color light sources, a plurality of second-color light sources and a plurality of third-color light sources which are switched on in sequence. The reflective display device is in a color display mode when the light source module is turned on. The reflective display device is in a monochrome display mode when the light source module is turned off.

Reflective display device having the functions of both monochrome and color display modes and driving method thereof

A light sensitive display apparatus and an operating method thereof are disclosed herein. The light sensitive display apparatus includes a plurality of pixels, and the operating method of the light sensitive display apparatus includes the following steps. In a writing state, a first data voltage and a first gate voltage are provided to the pixels, and the pixels illuminated by light rays are switched to or kept in a first display state. In an erasing state, a second data voltage and a second gate voltage are provided to the pixels, and the pixels illuminated by light rays are switched to or kept in a second display state.

Light sensitive display apparatus and operating method thereof

The signal line structure is disposed between a gate driver and a display area of a display. The signal line structure includes a substrate, first metal layers, a first insulation layer, second metal layers, a second insulation layer and third metal layers. The first metal layers are arranged in parallel and toward a first direction in the substrate. The first insulation layer is disposed in the substrate and covers the first metal layers. The second metal layers are disposed on the positions of the first insulation layer corresponding to the first metal layers. The second insulation layer is disposed on the second metal layers and the first insulation layer. The third metal layers are disposed on the positions corresponding to the second metal layers in the second insulation layer. The distance between two adjacent second metal layers is less than that between two adjacent first metal layers.

Signal line structure of a flat display

Growing community of inventors

Hsinchu, Taiwan

Ted-Hong Shinn