Hewlett-Packard Development Company, L.p.

Hewlett Packard Enterprise Development LP

Ted A Hadley

Susan K Langford

Embodiments herein relate to accessing a memory region including confidential information. A memory request from a process may be received. The memory request may include a process ID (PID) of the process, a requested memory address, and a requested access type. The memory request may be compared to a permission set associated with a memory region including the confidential information. Access to the memory region by the process may be controlled based on the comparison.

Access to memory region including confidential information

Example embodiments disclosed herein relate to security parameter zeroization. Example embodiments include security parameter zeroization based on a remote security monitor.

Security parameter zeroization

A security shield assembly has a printed circuit board having a plurality of layers, the plurality of layers including an electrically conductive penetration sensor layer, dielectric layers, and at least one signal layer. An electronic unit is mounted to the printed circuit board and electrically connected to the signal layer.

Security shield assembly

Examples disclosed herein relate to secure boot information with validation control data specifying a validation technique. Examples include determining, with the specified validation technique, whether validation data is consistent with the secure boot information.

Secure boot information with validation control data specifying a validation technique

In one implementation, a processor is provided that includes logic to enable a transition from a zeroize state to a clear state. In another implementation, a processor is provided that includes logic to enable a testing secure state, the testing state to enable a testing function; logic to enable a clear state, the clear state to enable a non-secure processing function and to disable a security function; logic to enable a transition from a testing secure state to a clear state; and logic to enable a full secure state, the full secure state to enable the processing function. In another implementation, a processor is provided that includes logic to disable a transition from a clear state to a secure state.

Transition between states in a processor

Example embodiments disclosed herein relate to storing event data and a time value in memory with an event logging module. Example embodiments of the event logging module include event command storage, clock command storage, and memory command storage.

Storing event data and a time value in memory with an event logging module

Examples disclose a processor with a measurement point to receive an input voltage and a voltage measurer to obtain a first voltage measurement. Further, the examples provide the processor with a switch, based on a signal, to enable a second voltage measurement at the measurement point. Additionally, the processor is to adjust the voltage measurer based on a difference between the first and second voltage measurements.

First and second voltage measurements to adjust a voltage measurer

A microcontroller is awakened from a lower power state in response to a trigger indication indicative of a fault condition. After the awakening, the microcontroller performs a security action with respect to secret information in the security module in response to the fault condition.

Managing a fault condition by a security module

A memory circuit may include a shift register ring including single-bit shift registers. The circuit may include a clock connected to the shift registers to shift bits within the shift register ring, and a counter connected to the clock and indicating positions of the bits in the shift register ring.

Memory circuit

In one implementation, a data set including a plurality of data values having an order is stored at a memory having a plurality of memory locations. Each data value from the data set stored a current memory location of that data value from the plurality of memory locations. Each data value from the data set is periodically moved from the current memory location of that data value from the plurality of memory locations to a next memory location of that data value from the plurality of memory locations. The next memory location of each data value from the plurality of memory locations is the current memory location of that data value from the plurality of memory locations after the moving. The plurality of data values is then provided in the order to a client in response to a request for the data set.

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Sunnyvale, CA, United States of America

Ted A Hadley