Renesas Technology Corp.

Renesas Electronics Corporation

Hitachi, Ltd.

Other

Honda Motor Co., Ltd.

Hitachi Ulsi Systems Co., Ltd.

Tatsuyuki Saito

Junji Noguchi

Hizuru Yamaguchi

Tsuyoshi Tamaru

Kensuke Ishikawa

Takayuki Oshima

Noriko Miura

Kiyomi Katsuyama

Nobuo Owada

Naofumi Ohashi

Tomio Iwasaki

Kenichi Takeda

Hiroshi Ashihara

Toshinori Imai

Naohumi Ohashi

Toshio Saito

Hizuru Yamaguchii

Masanori Miyauchi

Tomio Iwaskai

Hidenori Suzuki

Yasuko Yoshida

Hideaki Tsugane

Ken Okutani

Uitsu Tanaka

Tomonori Sekiguchi

Isamu Asano

Yoshitaka Nakamura

Noriyuki Sakuma

Shiro Mazawa

Atsushi Isobe

Tatemi Ido

Nobuaki Miyakawa

Takao Sakurai

Takashi Yunogami

Yuzuru Ohji

Yuudai Kamada

Chisaki Takubo

Akira Maeki

Takashi Shiota

Satoshi Moriya

Goichi Yokoyama

Toshio Saitoh

Morio Nakamura

An internal structure detection system includes: two kinds of sensors with different operating principles for receiving reflected waves of vibration applied to an inspection target in an investigation area; and a processing apparatus that detects an internal structure of the inspection target by using the sensor data received by the two kinds of sensors. The two kinds of sensors are deployed in the investigation area with different densities, in a distributed manner.

Internal structure detection system

Airtightness in a cavity of an inertial sensor (acceleration sensor) is increased to achieve high sensitivity. In the acceleration sensor having movable electrodes VE, VEand fixed electrodes FE, FE, the fixed electrodes are formed by portions surrounded by a through hole THprovided in a cap layer CL, and the through hole is filled with an insulating film IFand polysilicon P and has a wide portion (WP). The wide portion has a gap SP that is not filled with the insulating film IFand the polysilicon P, and the gap SP is filled with the interlayer insulating film ID. With such a configuration, degassing can be exhausted through the gap (airway) SP in a pressure reducing step.

Inertia sensor and method of manufacturing the same

The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed.

Semiconductor device and manufacturing method thereof

A semiconductor IC device includes a buried interconnection in interconnection layers over a semiconductor substrate, in which electrical connection of interconnections are provided over and under an interconnection layer of an embedded interconnection from among the interconnection layers such that a first connecting conductor portion within a connecting hole extending from an upper interconnection toward the interconnection layer of a predetermined buried interconnection and a second connecting conductor portion within the connecting hole extending from a lower interconnection toward the interconnection layer of the predetermined buried interconnection are electrically connected via a connecting conductor portion for relay in the connecting groove of the interconnection layer of a predetermined buried interconnection. The connecting conductor portion for relay is sized so that the length of the connecting conductor portion for relay in an extending direction of the predetermined buried interconnection is longer than that of the connecting hole.

Semiconductor integrated circuit device and fabrication process thereof

In order to improve the manufacturing yield of a semiconductor device having a three-dimensional structure in which a plurality of chips are stacked and attached to each other, the opening shape of each of conductive grooves (A) formed in each chip (C) obtained from a wafer (W) is rectangular, and the number of the conductive grooves (A) whose long-sides are directed in a Y direction and the number of the conductive grooves (A) whose long-sides are directed in an X direction perpendicular to the Y direction are made to be approximately equal to each other number in the entire wafer (W), whereby the film stress upon embedding of a conductive film into the interior of the conductive grooves is reduced, and generation of exfoliation and micro-cracks in the conductive film or warpage and cracks of the wafer (W) are prevented.

Semiconductor device

Growing community of inventors

Ome, Japan

Tatsuyuki Saito