Kabushiki Kaisha Toshiba

Tatsuya Sumiyoshi

Hirokuni Yano

Yoshimi Niisato

Toshikatsu Hida

Hiroshi Yao

Kenji Tanaka

Hajime Yamazaki

Mitsunori Tadokoro

Takashi Hirao

Shinji Yonezawa

Hiroki Matsudaira

Aurelien Nam Phong Tran

Takahiro Totsuka

A memory system of one embodiment includes: a nonvolatile memory including a plurality of word lines each connected to memory cells, each one of the memory cells being capable storing two bits, the memory cells connected to one of the plurality of word lines constituting an upper page and a lower page, each one of the pages being a unit of data programming; a random access memory configured to store an address translation table indicating relationships between logical addresses designated by a host and physical addresses in the nonvolatile memory. The memory system of the embodiment further includes a memory controller which execute data fixing for saving the address translation table from the random access memory to the nonvolatile memory; and write dummy data to at least one page subsequent to the page in which valid data has been written in the nonvolatile memory before executing the data fixing.

Memory system and method for writing data into memory system

A management information generating method wherein logical and physical block addresses (BAs) of continuous addresses are associated with each other in the BA translation table. When a logical block is constructed, a value is set for a maximum number of allowable defective physical blocks. A logical block having fewer defects than the set number is set usable, and a logical block having more defects than the set number is set unusable. System logical block construction is performed to preferentially select physical blocks from a plane list including a large number of usable blocks to equalize the number of usable blocks in each plane list. It is determined whether the number of free blocks is insufficient on the basis of a first management unit and whether the storage area for the indicated capacity can be reserved on the basis of the management unit different from the first unit.

Management information generating method, logical block constructing method, and semiconductor memory device

According to one embodiment, a free blocks included in a nonvolatile semiconductor memory are classified into a plurality of free block management lists. When a free block is acquired at normal priority, the free block is acquired from the free block management list in which a number of free blocks is larger than a first threshold. When a free block is acquired at high priority, the free block is acquired from the free block management list irrespective of the first threshold.

Memory system comprising blocks operable in parallel

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Kanagawa, Japan

Tatsuya Sumiyoshi