Toshiba Memory Corporation

Kabushiki Kaisha Toshiba

Kioxia Corporation

Tatsuya Okamoto

Masaaki Higuchi

Fumitaka Arai

Katsuyuki Sekine

Ryota Suzuki

Wataru Sakamoto

Tatsuya Kato

Fumiki Aiso

Takuo Ohashi

Hirokazu Ishigaki

Yasuhiro Shimura

Hiroshi Kanno

Takahiro Sugimoto

Masao Shingu

Hiroshi Nakaki

Hiroki Yamashita

Kenji Aoyama

Takashi Ishida

Tatsufumi Hamada

Yosuke Mitsuno

Masanari Hattori

A semiconductor memory device includes two first electrode films, a first column and a second insulating film. The two first electrode films extend in a first direction and are separated from each other in a second direction. The first column is provided between the two first electrode films and has a plurality of first members and a plurality of insulating members. Each of the first members and each of the insulating members are arranged alternately in the first direction. One of the plurality of first members has a semiconductor pillar, a second electrode film and a first insulating film provided between the semiconductor pillar and the second electrode film. The semiconductor pillar, the first insulating film and the second electrode film are arranged in the second direction. The second insulating film is provided between the first column and one of the two first electrode films.

Semiconductor memory device

A semiconductor device includes a first semiconductor layer that is an electrically-conductive polycrystalline semiconductor layer and a second semiconductor layer on the first semiconductor layer. The second semiconductor layer is an electrically-conductive polycrystalline semiconductor layer having a smaller average grain size than the first semiconductor layer. A plurality of electrode layers are stacked on the second semiconductor layer at intervals in a first direction. A third semiconductor layer extends in the first direction through the first semiconductor layer, the second semiconductor layer, and each of the electrode layers and contacts the second semiconductor layer. A charge storage layer is between the plurality of electrode layers and the third semiconductor layer.

Semiconductor device and method for manufacturing the same

A semiconductor memory device includes a first semiconductor well of a first conductivity type in a memory cell region and a contact region of a substrate, a second semiconductor well of a second conductivity type in the first semiconductor well in the contact region, a plurality of electrode films stacked on the first semiconductor well and spaced from one another in a first direction, the plurality of electrode films extending in a second direction within the memory cell region into the contact region, a first semiconductor pillar extending in the second direction through the plurality of electrode films in the memory cell region, a second semiconductor pillar extending in the second direction through at least one electrode film in the contact region, a charge storage film between the first semiconductor pillar and each electrode film, an insulating film between the second semiconductor pillar and the at least one electrode film.

According to the embodiment, a semiconductor device includes: a substrate; a stacked body provided on the substrate and including a plurality of electrode layers stacked with an insulator interposed; a semiconductor pillar provided on the substrate and in the stacked body; a semiconductor body provided in the stacked body; and an insulating film including a charge storage film provided between the plurality of electrode layers and the semiconductor body, and extending in the stacking direction. The semiconductor body includes a first portion and a second portion. The first portion is surrounded with the plurality of electrode layers and extends in a stacking direction of the stacked body. The second portion is in contact with an upper surface of the semiconductor pillar.

Semiconductor device and method for manufacturing same

According to an embodiment, a semiconductor memory device comprises: a plurality of control gate electrodes stacked above a substrate; a first semiconductor layer extending in a first direction above the substrate and facing the plurality of control gate electrodes; a gate insulating layer extending in the first direction and provided between the control gate electrode and first semiconductor layer; and a second semiconductor layer positioned downwardly of the first semiconductor layer and gate insulating layer, and connected to a lower end of the first semiconductor layer and the substrate. Moreover, the first semiconductor layer comprises: a first portion contacting an upper surface of the second semiconductor layer at a position more downward than a lower end of the gate insulating layer; and a second portion connected to an upper end of the first portion, extending in the first direction, and having a different crystalline structure from the first portion.

Semiconductor memory device and method of manufacturing the same

According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film.

Non-volatile memory device

A semiconductor memory device according to an embodiment includes a stacked body with electrode films and inter-electrode insulating films alternately stacked therein, a semiconductor member, a charge accumulation film, an insulating member and a floating electrode member. The semiconductor member is provided in the stacked body. The insulating member is provided at a position opposed to the inter-electrode insulating film on a side surface of the charge accumulation film. The insulating member is divided for each of the inter-electrode insulating films. The floating electrode member is provided on a region of the side surface of the charge accumulation film not covered with the insulating member. The floating electrode member is in contact with the charge accumulation film. The floating electrode member is divided for each of the electrode films. The floating electrode member has higher conductivity than the charge accumulation film.

According to one embodiment, a nonvolatile semiconductor memory device includes: a first stacked body having a gate insulating film, a first charge storage layer, a first insulating film, a second charge storage layer, and a second insulating film, a second element isolation region, a bottom and at least part of a side portion of the second element isolation region being in contact with the semiconductor substrate in the peripheral portion; and a second stacked body, a third insulating film, a first layer, a fourth insulating film, a second layer, and the second insulating film are stacked in this order from the semiconductor substrate side between the semiconductor substrate and the control gate electrode in the second stacked body in the peripheral portion, a side portion of the second stacked body being covered with the second insulating film.

Nonvolatile semiconductor memory device and method for manufacturing same

According to one embodiment, a nonvolatile semiconductor memory device includes a first memory string including a first memory cell and a second memory cell aligned along a first axis, a source contact provided at a source-side end of the first memory string, a second memory string that extends along the first axis and includes a third memory cell that aligns with the first memory cell along a second axis perpendicular to the first axis, and a shield conductive layer. The shield conductive layer extends along the first axis between the first memory string and the second memory string and is electrically connected to the source contact.

Growing community of inventors

Inabe, Japan

Tatsuya Okamoto