Hitachi, Ltd.

Other

Tatsuya Ohkubo

Yoshiro Mikami

Hiroshi Kageyama

Hideo Sato

Genshiro Kawachi

Kazuhito Masuda

Makoto Tsumura

Shinichi Komura

Masaya Adachi

Shoichi Hirota

Tetsuro Minemura

Kenkichi Suzuki

Masanao Yamamoto

Kazuhiro Kuwabara

Shigeo Shimomura

A liquid crystal display apparatus having a level conversion circuit in which a high speed operation can be attained and also a small transistor capacity can be obtained is provided. In the liquid crystal display apparatus, a signal circuit for driving pixel elements of a display unit and a scanning circuit are provided. The level conversion circuit is constituted of a first and a second transistorsandin which a respective gate electrodes is connected to a first bias voltage power supply, and a third and a fourth transistorsandin which a respective gate electrodes is connected to a second bias voltage power supply and a respective source electrodes is connected to a power supply.

Liquid crystal display apparatus having level conversion circuit

To prevent an n-channel thin-film transistor from being deteriorated by hot holes generated in a gate-negative pulse mode. A thin polysilicon filmis provided with a p-type semiconductor regionin contact with a channel region. The p-type semiconductor regionis electrically connected to nowhere except the channel region. Holes induced on the surface due to a gate-negative pulse are further supplied from the p-type semiconductor region. An electric field established by the gate-negative pulse is relaxed by the holes, fewer hot holes are injected into the gate oxide film, and the TFT characteristics are less deteriorated.

Static RAM having a TFT with n-type source and drain regions and a p-type region in contact with only the intrinsic channel of the same

A liquid crystal display apparatus includes semiconductor elements placed at intersection points between scanning wires and signal wires. Each semiconductor element includes: a semiconductor layer having a channel region and a pair of semiconductor regions which sandwich the channel region and which are each made of a high-resistance region and a low-resistance region; a first electrode formed on the intrinsic semiconductor region with an insulating film interposed therebetween; and second and third electrodes connected to the low-resistance regions. Each scanning wire constitutes the first electrode of the corresponding one of the semiconductor elements. The first electrode has a first wiring formed on the insulating film and second wiring formed in direct contact with a side surface of the first wiring, part of the second wiring being overlaid on part of a high-resistance region with the insulating film interposed therebetween.

Liquid crystal display device having gate electrode with two conducting layers, one used for self-aligned formation of the TFT semiconductor regions

A liquid crystal display apparatus having a level conversion circuit in which a high speed operation can be attained and also a small transistor capacity can be obtained is provided. In the liquid crystal display apparatus, a signal circuit for driving pixel elements of a display unit and a scanning circuit are provided. The level conversion circuit is constituted of a first and a second transistors and in which a respective gate electrodes is connected to a first bias voltage power supply, and a third and a fourth transistors and in which a respective gate electrodes is connected to a second bias voltage power supply and a respective source electrodes is connected to a power supply.

A drive circuit for a liquid crystal display apparatus and a large-sized liquid crystal display apparatus integrated with the drive circuit and having a reduced area occupied by the circuits. The drive circuit includes sample/hold circuits for sampling the input voltage at a predetermined timing, comparator circuits for comparing the output of the sample/hold circuits with the voltage of the signal line VD(i), switches for controlling the output voltage of the signal line, a voltage supply circuit constituted as an image signal control circuit for supplying a voltage to the switches, and control circuits for controlling the switches in accordance with the output of the comparator circuits. For the liquid crystal display panel drive circuit configured as described above, the signal line is controlled by the switches, and therefore the area occupied by the drive circuits can be reduced.

Liquid crystal display panel drive circuit and liquid crystal display apparatus having two sample/hold circuits coupled to each signal line

To prevent an n-channel thin-film transistor from being deteriorated by hot holes generated in a gate-negative pulse mode. A thin polysilicon film is provided with a p-type semiconductor region in contact with a channel region The p-type semiconductor region is electrically connected to nowhere except the channel region Holes induced on the surface due to a gate-negative pulse are further supplied from the p-type semiconductor region An electric field established by the gate-negative pulse is relaxed by the holes, fewer hot holes are injected into the gate oxide film, and the TFT characteristics are less deteriorated.

Semiconductor element and liquid crystal display device using the same

A liquid crystal display apparatus including a level conversion circuit in which a high speed operation can be attained and also a small transistor capacity can be obtained. In the liquid crystal display apparatus, a signal circuit for driving pixel elements of a display unit and a scanning circuit are provided. The level conversion circuit is constituted of first and second transistors and , the respective gate electrodes of which are connected to a first bias voltage power supply, and third and fourth transistors and , the respective gate electrodes of which are connected to a second bias voltage power supply and the respective source electrodes of which are connected to a power supply. The drain electrodes of the first and the second transistors and are connected to the respective drain electrodes of the third and the fourth transistors and . To the respective source electrodes of the first and the second transistors and , signals having a mutually different polarity and a low amplitude are inputted and from the respective drain electrodes of the first and the second transistors and , signals having a mutually different polarity and a high amplitude are taken out.

To prevent an n-channel thin-film transistor from being deteriorated by hot holes generated in a gate-negative pulse mode, a thin polysilicon film 10 is provided with a p-type semiconductor region 13 in contact with a channel region 14. The p-type semiconductor region 13 is electrically connected to nowhere except the channel region 14. Holes induced on the surface due to a gate-negative pulse are further supplied from the p-type semiconductor region 13. An electric field established by the gate-negative pulse is relaxed by the holes, fewer hot holes are injected into the gate oxide film, and the TFT characteristics are less deteriorated.

Semiconductor element with N channel and P region connected only to the

An improved liquid crystal display apparatus for low power consumption is provided, within each of the regions surrounded by a plurality of scanning electrodes and a plurality of signal electrodes, with a display data holding circuit connected to the corresponding scanning electrodes and signal electrodes, for fetching and storing a display data from the signal electrode in response to a scanning signal; a switching device connected to the display data holding circuit, its switching operation being controlled by the holding circuit; and a display electrode connected to the switching device.

Growing community of inventors

Chigasaki, Japan

Tatsuya Ohkubo