Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Toshiba Memory Corporation

Semiconductor Technology Academic Research Center

Tatsuya Ohguro

Takashi Yoshitomi

Hisayo S Momose

Hiroshi Iwai

Masanobu Saito

Mizuki Ono

Shinichi Nakamura

Yoshihiko Fuji

Mariko Takayanagi

Yoshiaki Sugizaki

Hideaki Fukuzawa

Akihiro Kojima

Michiko Hara

Akio Hori

Tatsuhiro Oda

Tamio Ikehashi

Takashi Yamaguchi

Susumu Obata

Mie Matsuo

Takanobu Kamakura

Masahiro Inohara

Tetsu Morooka

Kenichi Ootsuka

Hideharu Kojima

Ryoji Hasumi

Ryohei Nega

Hideki Kimijima

Kazuya Fukase

Kenichi Murooka

Takashi Yamada

Takashi Izumida

Satoshi Inaba

Hajime Nagano

Nobutoshi Aoki

Tatsuya Nishiwaki

Hiroaki Yamada

Akira Hokazono

Shingo Sato

Kenichi Matsushita

Shintaro Nakano

Yoshiharu Takada

Shigeru Kawanaka

Shunko Magoshi

Kohei Oasa

Shuichi Sekine

Kenji Kojima

Takuo Kikuchi

Yoshihiro Minami

Kazumi Inoh

Kentaro Ichinoseki

Masakazu Goto

Kimitoshi Okano

Shuichi Toriyama

Yoshiaki Toyoshima

Kikuo Aida

Atsushi Azuma

Yoshiyuki Kondo

Kazuyuki Ito

Satoshi Akutsu

Mitiko Miura

Nobuaki Makino

Norio Sadachika

Masahiro Yokomichi

Takahiro Kajiwara

Masataka Miyake

Takahiro Iizuka

Masahiko Taguchi

An insulating device includes a first electrode, a second electrode, and an insulating film. The insulating film is located between the first electrode and the second electrode. The insulating film includes a positive charged region. The positive charged region is located at a portion in a direction from the first electrode toward the second electrode.

Insulating device

An isolator includes a substrate; a first planar coil provided above the substrate and along a surface of the substrate; a first insulating portion on the first planar coil; a second planar coil on the first insulating portion; and a metal layer above the first insulating portion. The first planar coil, the second planar coil, and the metal layer are arranged in a first direction perpendicular to the surface of the substrate. The first planar coil and the second planar coil each having a center and an outer perimeter in a second direction along the surface of the substrate. A distance in the second direction from the center of the first planar coil to the outer perimeter of the first planar coil is less than a distance in the second direction from the center of the second planar coil to the outer perimeter of the second planar coil.

Isolator

According to one embodiment, an isolator includes first and second electrodes, first and second insulating portions, and a first dielectric portion. The first insulating portion is provided on the first electrode. The second electrode is provided on the first insulating portion. The second insulating portion is provided around the second electrode along a first plane perpendicular to a first direction. The second insulating portion contacts the second electrode. The first dielectric portion is provided between the first and second insulating portions. At least a portion of the first dielectric portion contacts the second electrode and is positioned around the second electrode along the first plane. A distance between a lower end of the second electrode and a first interface between the first dielectric portion and the second insulating portion is less than a distance between the first interface and an upper end of the second electrode.

According to one embodiment, an isolator includes first and second conductive members, and first second, and third insulating members. The first conductive member includes first, second, and third partial regions. The third partial region is between the first and second partial regions. The second conductive member is electrically connected to the first conductive member. The second conductive member includes fourth and fifth partial regions. The fourth partial region is between the third and fifth partial regions. The first insulating member includes first and second insulating regions. The fifth partial region is between the first and second insulating regions. The second insulating member includes third and fourth insulating regions. The fourth partial region is between the third and fourth insulating regions. The third insulating member includes first and second portions.

An isolator includes a lower electrode, a first insulating layer, a second insulating layer, an upper electrode, and a low permittivity portion. The first insulating layer is provided on the lower electrode, and includes a protruding portion in an upper portion of the first insulating layer. The second insulating layer is provided on the protruding portion, extends sideways from a region directly above the protruding portion, and has a specific permittivity higher than a specific permittivity of the first insulating layer. The upper electrode is in contact with an upper surface of the second insulating layer. The low permittivity portion is in contact with a side surface of the protruding portion and a lower surface of the second insulating layer. The low permittivity portion has a specific permittivity lower than the specific permittivity of the first insulating layer.

A semiconductor device includes: a first chip including first and second electrodes provided at a first surface, and a third electrode provided at a second surface positioned at a side opposite to the first surface; a second chip including fourth and fifth electrodes provided at a third surface, and a sixth electrode provided at a fourth surface positioned at a side opposite to the third surface, wherein the second chip is disposed to cause the third surface to face the first surface; a first connector disposed between the first electrode and the fourth electrode and connected to the first and fourth electrodes; and a second connector disposed between the second electrode and the fifth electrode and connected to the second and fifth electrodes.

Plurality of leads between MOSFET chips

An isolator includes an insulating layer, a first electrode provided on a first side of the insulating layer, and a second electrode provided on a second side of the insulating layer opposite to the first side. The second electrode faces the first electrode across the insulating layer. The insulating layer includes therein a gap between the first electrode and the second electrode. The gap extends along a plane perpendicular to a thickness direction of the insulating layer.

According to one embodiment, a digital isolator includes a first metal portion, a first insulating portion, a second metal portion, a third metal portion, and a first layer. The first insulating portion is provided on the first metal portion. The second metal portion is provided on the first insulating portion. The third metal portion includes first, second, and third portions. The first portion is provided around the first metal portion in a direction perpendicular to a first direction. The second portion is provided on a portion of the first portion with a first conductive layer interposed. The third portion is provided on the second portion and provided around the second metal portion in the perpendicular direction. The first layer contacts the first conductive layer and an other portion of the first portion and is provided around a bottom portion of the second portion.

Digital isolator

A semiconductor device includes a semiconductor part, a terminal insulating film, a first protective film, a second electrode, a terminal electrode, a first insulating film, and a second protective film. The terminal insulating film is provided on the semiconductor part in the terminal region. The first protective film is provided on the terminal insulating film. The first and second protective films includes silicon and nitrogen. The second electrode is provided on the semiconductor part in the cell region and includes an end portion located on the first protective film. The terminal electrode is provided on the first protective film in the terminal region and is connected to the semiconductor part. The first insulating film is provided on the first protective film. The first insulating film includes hydrogen and contacts the second electrode and the terminal electrode. The second protective film covers the first insulating film.

Semiconductor device

A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a semiconductor element provided in the semiconductor substrate, the semiconductor element including a gate insulating film provided in the first plane, a first electrode provided on the first plane, a second electrode provided on the first electrode, the second electrode including a first metal material, the second electrode having a film thickness of (65 [g&#xb7;&#x3bc;m&#xb7;cm])/(density of the first metal material [g&#xb7;cm]) or more, a first solder portion provided on the second electrode, a third electrode provided on the first solder portion, a fourth electrode provided on the first plane, a fifth electrode provided on the fourth electrode, the fifth electrode including a second metal material, the fifth electrode having a film thickness of (65 [g&#xb7;&#x3bc;m&#xb7;cm])/(density of the second metal material [g&#xb7;cm]) or more, a second solder portion provided on the fifth electrode, and a sixth electrode provided on the second solder portion.

According to one embodiment, a strain and pressure sensing device includes a semiconductor circuit unit and a sensing unit. The semiconductor circuit unit includes a semiconductor substrate and a transistor. The transistor is provided on a semiconductor substrate. The sensing unit is provided on the semiconductor circuit unit, and has space and non-space portions. The non-space portion is juxtaposed with the space portion. The sensing unit further includes a movable beam, a strain sensing element unit, and first and second buried interconnects. The movable beam has fixed and movable portions, and includes first and second interconnect layers. The fixed portion is fixed to the non-space portion. The movable portion is separated from the transistor and extends from the fixed portion into the space portion. The strain sensing element unit is fixed to the movable portion. The first and second buried interconnects are provided in the non-space portion.

Strain and pressure sensing device, microphone, method for manufacturing strain and pressure sensing device, and method for manufacturing microphone

According to one embodiment, a semiconductor memory device includes first conductive layers extending in a first direction and stacked in a second direction intersecting the first direction, a first semiconductor layer extending in the second direction and including a material having one of a first conductivity type and a second conductivity type, a first insulation layer disposed inside the first semiconductor layer, a second conductive layer disposed inside the first insulation layer, and a variable resistance layer disposed between the first conductive layers and the first semiconductor layer.

Semiconductor memory device having local bit line with insulation layer formed therein

A semiconductor device according to an embodiment includes a gate electrode, a first dielectric film, an oxide semiconductor film, a second dielectric film, a source electrode and a drain electrode. The first dielectric film is placed above the gate electrode. The oxide semiconductor film is placed above the first dielectric film. The oxide semiconductor film is formed to have a film thickness in a first contact region in contact with the source electrode and a second contact region in contact with the drain electrode larger than a film thickness in a channel region of the oxide semiconductor film so that a film portion of the first contact region projects toward the source electrode side and a film portion of the second contact region projects toward the drain electrode side.

Semiconductor device and method for fabricating semiconductor device

Growing community of inventors

Yokohama, Japan

Tatsuya Ohguro