Foveon, Inc.

Tatsuya Inui

Glenn Jay Keller

Shrinath Ramaswami

Shigemi Yamazaki

Jonathan Yu

Glen Jay Keller

In an array of multi-color vertical detector color pixel sensors, a readout wiring architecture includes a transfer transistor for each individual color detector. In first and second rows in a first column, the first, second, and third color transfer transistor gates are coupled, respectively, to the first, second, and third row-select lines. In a first row in a second column, the first color transfer transistor gate is coupled to the second row-select line, the second color transfer transistor gate is coupled to the first row-select line, and the third color transfer transistor gate is coupled to the third row-select line. In a second row in the second column, the first color transfer transistor gate is coupled to the first row-select line, the second color transfer transistor gate is coupled to the third row-select line, and t the third color transfer transistor gate is coupled to the second row-select line.

Sub-sampled color channel readout wiring for vertical detector pixel sensors

In an array containing rows and columns of multi-color vertical detector color pixel sensors disposed in a rows and columns of the array, a readout wiring architecture includes a plurality of row-select lines for each row of the array, equal to the number of colors in the vertical detector color pixel sensors, an individual column line for each column, a transfer transistor for each individual color detector coupled between a color detector and a column line associated with the column in which the color detector is disposed. Each transfer transistor has a gate coupled to one of the plurality of row-select lines in a row in which the vertical detector color pixel sensor is disposed. The gates of at least some of the transfer transistors in each row for each color detector in adjacent columns of the array are coupled to different ones of the row-select lines for that row.

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Kawasaki, Japan

Tatsuya Inui