Kabushiki Kaisha Toshiba

Tatsuya Inatsuki

Kiyoshi Kobayashi

Kiyofumi Ochii

Mitsuo Isobe

Hisashi Ueno

Makiji Kobayashi

A semiconductor memory having dynamic memory cells includes a determining circuit for determining whether or not it is necessary to refresh the dynamic memory cells, and only when it is necessary, outputting a refresh execution signal in response to a refresh request signal from an external circuit, and a circuit for executing a refresh operation in response to the refresh execution signal. Even if the refresh request signal is supplied, a refresh operation is not executed unless the determining circuit determines that the refresh operation is necessary, thus dispensing with unnecessary refresh operations. Preferably, the determining circuit includes a timer which outputs a signal at every predetermined period. Only when the signal is output from the timer, is the refresh request signal from an external circuit accepted and the refresh execution signal output.

Semiconductor memory

A semiconductor device has a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type; an interconnection layer, containing an impurity of a second conductivity type, for connecting the first and second semiconductor regions; and a third semiconductor region of the second conductivity type which is formed in the first semiconductor region upon diffusion of the impurity from the interconnection layer to the first semiconductor region, the first and third semiconductor regions being adapted to form a p-n junction diode.

Growing community of inventors

Yokohama, Japan

Tatsuya Inatsuki