Tdk Corporation

Sae Magnetics (h.k.) Limited

Headway Technologies, Incorporated

The University of Tokyo

National Institute of Advanced Industrial Science and Technology

Tatsuya Harada

Yoshitaka Sasaki

Hiroyuki Ito

Nobuyuki Okuzawa

Satoru Sueki

Naoto Matono

Hiroshi Ikejima

Koichi Otani

Kenji Yokoyama

Hidetaka Kawano

Hideki Nakayama

Kunimasa Nakata

Atsushi Iijima

Kenichi Yoshida

Tetsuya Roppongi

Norikazu Ota

Kazumasa Fukuda

Shigeru Shoji

Susumu Aoki

Ryuji Hashimoto

Katsumichi Tagami

Noriaki Kasahara

Takamitsu Sakamoto

Daisuke Sakamoto

Kenkichi Anagawa

Hiroki Matsukuma

Hiroaki Kawashima

Nobuyuki Otsu

Yasuo Kuniyoshi

Rie Matsumoto

Hirotaka Gomi

Yuji Tokozume

Rie Yamaguchi

Yoshihiko Koyama

Provided is a learning method, a learning program, a learning device, and a learning system, for training a classification model, to further raise the correct answer rate of classification by the classification model. The learning method includes execution of generating one piece of composite data by compositing a plurality of pieces of training data of which classification has each been set, or a plurality of pieces of converted data obtained by converting the plurality of pieces of training data, at a predetermined ratio, inputting one or a plurality of pieces of the composite data into the classification model, and updating a parameter of the classification model so that classification of the plurality of pieces of training data included in the composite data is replicated at the predetermined ratio by output of the classification model, by a computer provided with at least one hardware processor and at least one memory.

Learning method, learning program, learning device, and learning system

An object of the present invention is to provide an authentication system and method which can reduce a burden on a user while ensuring security by using a combination of a plurality of authentication methods. A method for authentication of the present invention comprises the steps of: obtaining a first authentication performance value for each transaction based on initial input information at a transaction; determining whether or not additional authentication is required for authentication of a person by comparing the first authentication performance value and the authentication performance threshold value required for authentication of a person; presenting, if the additional authentication is required, a plurality of authentication methods from which one authentication method or a combination of authentication methods can be selected so as to satisfy an additional authentication performance value obtained using the first authentication performance value and the authentication performance threshold value; and obtaining a second authentication performance value based on additional input information using the one or more authentication methods selected from the plurality of presented authentication methods, and determining whether to authenticate by comparing the additional authentication performance value and the second authentication performance value.

Authentication system and method

A through wiring substrate comprises a substrate having a pair of principal surfaces and a through hole penetrating between the pair of principal surfaces, the pair of principal surfaces and an inner surface of the through hole being electrically insulative; a through electrode provided on the inner surface of the through hole; a first wiring layer provided on one of the principal surfaces and connected to the through electrode; a second wiring layer provided on the other of the principal surfaces and connected to the through electrode; an underlying metal layer provided between the one of the principal surfaces and the first wiring layer; and catalyst metal particles existing between the underlying metal layer and the first wiring layer and between the through electrode and the inner surface of the through hole.

Through wiring substrate

A method of manufacturing a layered chip package that includes a main body, and wiring disposed on a side surface of the main body. The main body includes a plurality of layer portions. The method includes fabricating a plurality of substructures, and completing the layered chip package by fabricating the main body using the plurality of substructures and by forming the wiring on the main body. Each substructure is fabricated through the steps of: fabricating a pre-substructure wafer including a plurality of pre-semiconductor-chip portions aligned; distinguishing between a normally functioning pre-semiconductor-chip portion and a malfunctioning pre-semiconductor-chip portion among the plurality of pre-semiconductor-chip portions included in the pre-substructure wafer; and forming electrodes connected to the normally functioning pre-semiconductor-chip portion and having respective end faces located in the side surface of the main body on which the wiring is disposed, without forming any electrode connected to the malfunctioning pre-semiconductor-chip portion.

Method of manufacturing layered chip package

A layered chip package includes a main body and a plurality of through electrodes. The main body includes a plurality of layer portions stacked and a plurality of through holes that penetrate all the plurality of layer portions. The plurality of through electrodes are provided in the plurality of through holes of the main body and penetrate all the plurality of layer portions. Each of the plurality of layer portions includes a semiconductor chip. At least one of the plurality of layer portions includes wiring that electrically connects the semiconductor chip to the plurality of through electrodes. The wiring includes a plurality of conductors that make contact with a through electrode that is exposed in the wall faces of any one of the plurality of through holes and passes through the through hole.

Layered chip package and method of manufacturing same

An image data processing system has a learning storage apparatus that stores projection matrixes obtained by canonical correlation analysis so as to derive, based on at least one of an image feature and a word feature, a latent variable as an abstract concept used for associating an image with a word corresponding thereto and that further stores information required for obtaining the latent variable acquired by use of the projection matrixes, a probability of occurrence of an arbitrary image feature from a certain latent variable and a probability of occurrence of an arbitrary word feature from a certain latent variable. In this way, a probability of the image feature and word feature being simultaneously outputted can be easily and quickly determined, thereby executing a high-speed annotation or retrieval with high precision.

Correspondence learning apparatus and method and correspondence learning program, annotation apparatus and method and annotation program, and retrieval apparatus and method and retrieval program

A layered chip package has a main body including pairs of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip. The pairs of layer portions include specific pairs of layer portions. Each of the specific pairs of layer portions includes a first-type layer portion and a second-type layer portion. The first-type layer portion includes electrodes each connected to the semiconductor chip and each having an end face located at the side surface of the main body on which the wiring is disposed, whereas the second-type layer portion does not include such electrodes. The specific pairs of layer portions are provided in an even number.

Layered chip package with wiring on the side surfaces

A magnetic head incorporates: a medium facing surface; a coil; a pole layer; first and second shields disposed to sandwich the pole layer therebetween; a first gap layer disposed between the first shield and the pole layer; a second gap layer disposed between the second shield and the pole layer; and a substrate. The first shield is located closer to the substrate than the second shield. The magnetic head further incorporates an antireflection film disposed between the first shield and the first gap layer or between the first gap layer and the pole layer. The pole layer is formed by frame plating.

Magnetic head including a pole layer and an antireflection film sandwiched by two shields

Provided is a method of manufacturing a perpendicular magnetic recording head which can enhance accuracy and simplify the manufacturing process. The method includes: forming a photoresist pattern having an opening part; forming a non-magnetic layer so as to narrow the opening part by a dry film forming method such as ALD method; stacking a seed layer and a plating layer so as to bury the opening part provided with the non-magnetic layer; and forming a main magnetic pole layer by polishing the non-magnetic layer, the seed layer, and the plating layer by CMP method until the photoresist pattern is exposed. The final opening width is unsusceptible to variations, thus reducing the number of the steps of forming the main magnetic layer.

Method of forming magnetic layer pattern, and method of manufacturing perpendicular magnetic recording head

A layered chip package includes: a plurality of layer portions stacked, each of the layer portions including a semiconductor chip; and a heat sink. Each of the plurality of layer portions has a top surface, a bottom surface, and four side surfaces. The heat sink has at least one first portion, and a second portion coupled to the at least one first portion. The at least one first portion is adjacent to the top surface or the bottom surface of at least one of the layer portions. The second portion is adjacent to one of the side surfaces of each of at least two of the plurality of layer portions.

Layered chip package with heat sink

A layered chip package includes a main body including a plurality of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip, an insulating portion covering at least one side surface of the semiconductor chip, and a plurality of electrodes connected to the semiconductor chip. The insulating portion has an end face located at the side surface of the main body on which the wiring is disposed. Each electrode has an end face surrounded by the insulating portion and located at the side surface of the main body on which the wiring is disposed.

Layered chip package

A magnetic head incorporates: a medium facing surface; a coil; a pole layer; first and second shields disposed to sandwich the pole layer therebetween; a first gap layer disposed between the first shield and the pole layer; a second gap layer disposed between the second shield and the pole layer; and a substrate. The first shield is located closer to the substrate than the second shield. The first shield has a first layer and a second layer disposed between the first layer and the first gap layer.

Magnetic head for perpendicular magnetic recording and method of manufacturing same, the magnetic head incuding pole layer and two shields sandwiching the pole layer

A layered chip package has a main body including pairs of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip. The pairs of layer portions include at least one specific pair of layer portions including a first-type layer portion and a second-type layer portion. The first-type layer portion includes electrodes each connected to the semiconductor chip and each having an end face located at the side surface of the main body on which the wiring is disposed, whereas the second-type layer portion does not include such electrodes. A layered substructure formed of a stack of two substructures, each of which includes aligned preliminary layer portions, is used to fabricate a stack of a predetermined two or greater number of pairs of layer portions, and the main body is fabricated by stacking an additional first-type layer portion together with the stack, the number of the additional first-type layer portion being equal to the number of the specific pair(s) of layer portions included in the stack.

A layered chip package includes a main body including a plurality of layer portions, and wiring disposed on a side surface of the main body. The plurality of layer portions include at least one layer portion of a first type and at least one layer portion of a second type. The layer portions of the first and second types each include a semiconductor chip. The layer portion of the first type further includes a plurality of electrodes each connected to the semiconductor chip and each having an end face located at the side surface of the main body on which the wiring is disposed, whereas the layer portion of the second type does not include any electrode connected to the semiconductor chip and having an end face located at the side surface of the main body on which the wiring is disposed. The wiring is connected to the end face of each of the plurality of electrodes.

A magnetic head includes: a coil; a pole layer; a shield having an end face located in a medium facing surface forward of an end face of the pole layer along a direction of travel of a recording medium; a gap layer between the shield and the pole layer; and a substrate on which the foregoing elements are stacked. The top surface of the pole layer includes: first and second portions with a difference in height therebetween; and a third portion connecting the first and second portions to each other. The first portion has an edge located in the medium facing surface, and the second portion is located farther from the medium facing surface and from the substrate than the first portion. The magnetic head further includes a nonmagnetic layer disposed between the second portion and the gap layer. The nonmagnetic layer has a surface touching the second portion, the surface having an edge located at the boundary between the second and third portions. The nonmagnetic layer has a thickness equal to or greater than the difference in height between the first and second portions.

Magnetic head for perpendicular magnetic recording with a shield and a pole layer having a top surface with first and second portions at different heights, and method of manufacturing same

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Tokyo, Japan

Tatsuya Harada