Asahi Kasei Microdevices Corporation

Tatsuya Chubachi

Daisuke Matsuoka

Junya Nakanishi

Ryuzo Yamamoto

A DWA circuit includes: a thermometer conversion unit configured to convert an input digital signal into a thermometer code; a shift amount storage unit configured to store a shift amount; a shift unit configured to cyclically shift the thermometer code; an arrangement conversion unit configured to supply, to an analog output circuit, an output control code obtained by converting a bit arrangement of a shifted code; and an update unit configured to update the shift amount, in which the shifted code includes a plurality of unconverted bit fields, the output control code includes a plurality of converted bit fields, and the arrangement conversion unit is configured to perform arrangement conversions on a plurality of bits having a same position in a bit field in the plurality of unconverted bit fields, to arrange the plurality of bits in a same converted bit field among the plurality of converted bit fields.

DWA circuit and DA conversion apparatus

To reduce distortion of output analog signals generated at a current-output DA converter. A DA converter that outputs a differential analog signal corresponding to an input digital signal is provided, including: a current output unit outputting a current corresponding to the digital signal to each of first and second wires; a converting unit outputting, as positive-side and negative-side analog signals, voltage signals based on currents flowing through the first and second wires, respectively; a first noise reducing unit having: a first switch switched to be or not to be electrically connected with the first wire; and a first buffer provided between the first switch and a reference potential; and a second noise reducing unit having: a second switch switched to be or not to be electrically connected with the second wire; and a second buffer provided between the second switch and the reference potential.

DA converter and DA conversion method

The DA converter according to the present invention includes: first and second analog segment units a plurality of capacitors of sampling capacitor groups charged according to signal levels of digital signals input in a sampling phase; and a calculation unit that outputs an analog signal according to a charged voltage of each capacitor of the sampling capacitor group of the first or second analog segment unit in an integral phase, wherein, when one analog segment unit of the first and second analog segment units is in the sampling phase, the other analog segment unit is in the integral phase.

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Tokyo, Japan

Tatsuya Chubachi