Kabushiki Kaisha Toshiba

Other

Toshiba Electronic Devices & Storage Corporation

Nisshinbo Industries, Inc.

National Institute of Advanced Industrial Science and Technology

Itochu Corporation

Tsukishima Kikai Co., Ltd.

Fuji Electric Co., Ltd.

National Institute for Materials Science

Toshiba Energy Systems & Solutions Corporation

Tatsuo Shimizu

Ryosuke Iijima

Takashi Shinohe

Johji Nishio

Chiharu Ota

Teruyuki Ohashi

Hisashi Saito

Toshiya Yonehara

Yukio Nakabayashi

Kazuto Takao

Masahiko Kuraguchi

Kazushige Yamamoto

Daimotsu Kato

Toshihide Ito

Hiroshi Ono

Masato Koyama

Akira Mukai

Takaya Sato

Shigeya Kimura

Hisashi Yoshida

Hiroshi Kono

Koichi Muraoka

Yuichiro Mitani

Yosuke Kajiwara

Hideki Satake

Mitsuhiro Kushibe

Aya Shindome

Takeshi Yamaguchi

Tomoaki Inokuchi

Atsuhiro Kinoshita

Yukie Nishikawa

Shigeru Haneda

Hiro Gangi

Shigeto Fukatsu

Toshiyuki Oshima

Shinya Nunoue

Yasutaka Nishida

Takashi Kawakubo

Yusuke Kobayashi

Akira Takashima

Takuma Suzuki

Yasushi Nakasaki

Shintaro Nakano

Masamichi Suzuki

Masahiro Koike

Yoshihiko Moriyama

Noburu Fukushima

Hirotaka Nishino

Masayasu Miyata

Keiko Ariyoshi

Hiroki Nemoto

Masahiro Koyama

Souzou Kanie

Po-Chin Huang

Norihito Tambo

Tetsuo Hatakeyama

Hiroshi Watanabe

Hiroshi Tomita

Hideyuki Funaki

Naoki Yasuda

Kazuhiro Suzuki

Shinsuke Harada

Akira Nishiyama

Hideyuki Nishizawa

Kazuhide Abe

Yoshinori Tsuchiya

Tatsuya Nishiwaki

Yoshinori Iida

Tatsunori Sakano

Risako Ueno

Takaaki Yasumoto

Ryoichi Ohara

Hiroshi Yoshida

Shinya Kyogoku

Hisao Miyazaki

Naoko Yanase

Haruhiko Yoshida

Shoko Kikuchi

Takeshi Hoshi

Shunsuke Asaba

Takahito Kojima

Satoshi Itoh

Junji Senzaki

Souichi Ueno

Izumi Hirano

Zenzo Hashimoto

Ryosuke Iljima

Takahisa Ohno

Nobuo Tajima

Shigenori Minamiru

Hideto Mitsuhashi

Akiko Masada

Tomoaki Kaneko

Takahiro Yamasaki

Jun Nara

A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes n-type first SiC region having a first portion contacting a first plane, p-type second SiC region, n-type third SiC region, and a gate electrode. The diode region includes the first SiC region having a second portion contacting the first plane and p-type fourth SiC region. The semiconductor device includes a first electrode contacting the first portion and the second portion and a second electrode contacting a second plane. An occupied area per unit area of the fourth SiC region is larger than an occupied area per unit area of the second SiC region. In addition, a first diode region is provided between a first transistor region and a second transistor region. An inorganic insulating layer is provided between the first electrode and a gate wiring adjacent to the first electrode.

Semiconductor device, inverter circuit, driving device, vehicle, and elevator

According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include preparing a structure body, the structure body including a silicon carbide member and a first film stacked with the silicon carbide member. The first film includes silicon and oxygen. The method can include performing a first treatment of heat-treating the structure body in a first atmosphere including hydrogen. The method can include, after the first treatment, performing a second treatment of heat-treating the structure body in a second atmosphere including nitrogen and oxygen. An oxygen concentration in the second atmosphere is not less than 5 ppm and not more than 1000 ppm.

Semiconductor device and method for manufacturing semiconductor device

Provided is a method for manufacturing a semiconductor device, the method including: performing first ion implantation ion-implanting a p-type impurity into a silicon carbide layer; performing second ion implantation ion-implanting carbon (C) into the silicon carbide layer; performing a first heat treatment activating the p-type impurity; performing a first oxidation treatment oxidizing the silicon carbide layer; performing an etching treatment etching the silicon carbide layer in an atmosphere containing hydrogen gas; forming a first metal film containing at least one metal element selected from the group consisting of nickel, palladium, platinum, and chromium; performing a second heat treatment causing the silicon carbide layer to react with the first metal film to form a metal silicide layer containing the at least one metal element; and forming a second metal film having a chemical composition different from a chemical composition of the first metal film.

Method for manufacturing semiconductor device, semiconductor device, inverter circuit, driving device, vehicle, and elevator

According to one embodiment, a wafer includes a base body including a first surface, and a crystal layer provided on the first surface. The crystal layer includes first stacking faults and one or second stacking faults. One of the first stacking faults includes a first long side, a first short side, and a first hypotenuse. A position of the first long side in a first direction from the base body to the crystal layer is between the base body in the first direction and a first corner portion in the first direction. One of the one or the plurality of second stacking faults includes a second long side, a second short side, and a second hypotenuse. A position of a second corner portion in the first direction is between the base body in the first direction and the second long side in the first direction.

Wafer having a silicon carbide crystal layer with stacking faults provided on a silicon carbide base body and semiconductor device manufactured using the wafer

According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first insulating film. The first semiconductor region includes a first partial region, a second partial region, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The second semiconductor region includes a sixth partial region and a seventh partial region. The third electrode overlaps the sixth and seventh partial regions. The first insulating film includes a portion provided between the third electrode and the third partial region, between the third electrode and the fourth partial region, between the third electrode and the fifth partial region, between the third electrode and the sixth partial region, and between the third electrode and the seventh partial region.

Semiconductor device and method for manufacturing the same

According to one embodiment, a semiconductor device includes first to third electrodes, a first conductive member, a semiconductor member, and a first insulating member. The third electrode includes a third electrode end portion and a third electrode other end portion. The third electrode end portion is between the first electrode and the third electrode other end portion. The first conductive member includes a first conductive member end portion and a first conductive member other end portion. The first conductive member end portion is between the first electrode and the first conductive member other end portion. The semiconductor member includes first to third semiconductor regions. The first semiconductor region includes first and second partial regions. The first insulating member includes silicon and oxygen. The first insulating member includes a first element including at least one selected from the group consisting of nitrogen, aluminum, hafnium and zirconium at the third position.

According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, first and second insulating members, and a first nitride member. A position of the third electrode in a first direction from the first to second electrodes is between positions of the first and second electrodes in the first direction. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first to fifth partial regions. The second semiconductor region includes first and second semiconductor portions. The second semiconductor portion includes first and second portions, and a third portion between the first and second portions. The first conductive member includes first and second conductive regions. The first insulating member includes a first insulating region. The second insulating member includes first and second insulating portions. The first nitride member includes a first nitride region.

Semiconductor device

A semiconductor device includes first to third electrodes, a semiconductor member, first and second insulating members, a compound member, and a nitride member. The third electrode is between the first and second electrodes. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first to fifth partial regions. The second semiconductor region includes first and second semiconductor portions. The first insulating member includes first and second insulating portions. The first semiconductor portion is between the fourth partial region and the first insulating portion. The second semiconductor portion is between the fifth partial region and the second insulating portion. The compound member includes first to third compound portions. The nitride member includes first to third nitride portions. The second insulating member includes first and second insulating regions. The first and second insulating regions are between the nitride regions and the third electrode.

Semiconductor device including compound and nitride members

A semiconductor device of embodiments includes: a silicon carbide layer having a first face and a second face and including a first trench, a second trench having a distance of 100 nm or less from the first trench, a first silicon carbide region of n-type, a second silicon carbide region of p-type between the first trench and the second trench, a third silicon carbide region of n-type between the second silicon carbide region and the first face, a fourth silicon carbide region between the first trench and the second silicon carbide region and containing oxygen, and a fifth silicon carbide region between the second trench and the second silicon carbide region and containing oxygen; a first gate electrode in the first trench; a second gate electrode in the second trench; a first gate insulating layer; a second gate insulating layer; a first electrode; and a second electrode.

Semiconductor device including silicon carbide region containing oxygen

A semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type including a first portion and a second portion, a second semiconductor layer of a second conductivity type, a third semiconductor region of the first conductivity type, a fourth semiconductor region of the second conductivity type, a gate electrode located between the second semiconductor region and the fourth semiconductor region and between the third semiconductor region and the fourth semiconductor region in a second direction, a first insulating region, a third electrode, and a second insulating region.

Semiconductor device that includes at least four semiconductor regions

A semiconductor device of embodiments includes: a silicon carbide layer having a first face having an off angle equal to or more than 0° and equal to or less than 8° with respect to a {0001} face and a second face facing the first face and having a 4H-SiC crystal structure; a gate electrode extending in a first direction parallel to the first face; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×10cm. Assuming that a first reference length in the first direction is 0.5 μm, a surface roughness of a surface of the silicon carbide layer in a range of the first reference length is equal to or less than 1 nm.

Semiconductor device, semiconductor device manufacturing method, inverter circuit, drive device, vehicle, and elevator

A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×10cm. Nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×10cm, and a carbon concentration at the position is equal to or less than 1×10cm.

Semiconductor device, method for manufacturing semiconductor device, inverter circuit, drive device, vehicle, and elevator

A semiconductor device of embodiments includes: a silicon carbide layer having a first face and a second face opposite to the first face, and including a p-type silicon carbide region in contact with the first face, a percentage of a first silicon atom among a plurality of silicon atoms present in a first layer as an uppermost layer being equal to or more than 90% and a site position of the first silicon atom being different from a site position of a silicon atom in a third layer from the first face and the same as a site position of a silicon atom in a fifth layer from the first face; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region between the silicon carbide layer and the silicon oxide layer including nitrogen.

A semiconductor device according to an embodiment includes: a silicon carbide layer; a metal layer; and a conductive layer positioned between the silicon carbide layer and the metal layer, the conductive layer containing a silicide of one metal element (M) selected from the group consisting of nickel (Ni), palladium (Pd), and platinum (Pt), and the conductive layer having a carbon concentration of 1×10cmor less.

Semiconductor device, method for manufacturing semiconductor device, inverter circuit, driving device, vehicle, and elevator

According to an embodiment, provided is a semiconductor device including: a first electrode; a second electrode; and a silicon carbide layer disposed between the first electrode and the second electrode, the silicon carbide layer including: a first silicon carbide region of an n-type; and a second silicon carbide region disposed between the first silicon carbide region and the first electrode, the second silicon carbide being in contact with the first electrode, and the second silicon carbide containing one oxygen atom bonding with four silicon atoms.

Semiconductor device, method of manufacturing semiconductor device, inverter circuit, drive device, vehicle, and elevator

Growing community of inventors

Shinagawa, Japan

Tatsuo Shimizu