Mitsubishi Denki Kabushiki Kaisha

Tatsuo Okamoto

Hideaki Arima

Katsuhiro Tsukamoto

Atsushi Hachisuka

Mitsuya Kinoshita

Yaichiro Watakabe

Masahiro Shimizu

Kiyoto Watabe

Akihiko Ohsaki

Shuichi Matsuda

Hideo Kotani

Yasushi Kinoshita

Yoshikazu Nishikawa

Takio Oono

Tatsuhiko Ikeda

Ikuo Ogoh

Hiroaki Morimoto

Hiroshi Harada

Saburou Oosaki

Kouji Eguchi

In a semiconductor memory device having cylindrical capacitors, word lines and a bit line are formed on a semiconductor substrate. A cylindrical storage node is connected to a conductive layer. The cylindrical storage node is provided at its inner wall with protruded conductive conductors which protrudes in a radially inward direction of the cylindrical storage node. A surface of the cylindrical storage node is covered with a capacitor insulating film. The outer surface of the cylindrical storage node is covered with a cell plate with the capacitor insulating film therebetween.

Semiconductor memory device and method of manufacturing the same

The semiconductor memory device includes a semiconductor substrate 1 having a conductive layer 6 formed on its main surface. Word lines 4c, 4d and a bit line 11 is formed on the semiconductor substrate. Insulating films 8, 12 are provided to cover the word lines 4c, 4d and the bit line 11. A barrier film 14 is provided on the insulating films 8, 12 for protecting the insulating films 8, 12 from etchant. A cylindrical storage node 170 is electrically connected to the conductive layer 6. The cylindrical storage node 170 includes a bottom conductive portion 17a and a sidewall conductive portion 17b. An outer surface of the storage node 170 is covered with a capacitor insulating film 112. The outer surface of the cylindrical storage node 170 is covered with a cell plate 22, with the capacitor insulating film 112 interposed therebetween.

Method of manufacturing a semiconductor device having a cylindrical

Semiconductor memory device having cylindrical capacitor and

A photomask manufacturing process including a step of forming metal silicide film on a transparent silica glass substrate. A resist is applied onto the metal silicide film and then a patterning mask is provided by light or electron beam, followed by developing step. Exposed portions of the metal silicide film is etched away using a dry etching process.

Process for manufacturing a photomask

Conductive layers (5a, 8a) included in a multi-layer structure (30a) are electrically interconnected through an conductive connection wall (13a) provided in a contact hole (12) and contacting the side surface (22) of the multi-layer structure (30a). The upper conductive layer (11a) existing on the multi-layer structure (30a) and the lower conductive layer (3) existing under the multi-layer structure (30a) are electrically interconnected through a conductive film (11b) provided in the contact hole (12). These two interconnections are insulated from each other by an insulating film (18) provided on the connection wall (13a).

Method for manufacturing interconnection structure in semiconductor

The present invention relates to a semiconductor device having a contact electrode structure and a method of manufacturing the same. An insulating layer is provided in a second semiconductor layer or in a junction part between the second semiconductor layer and a first semiconductor layer correspondence to a contact hole. Therefore, even if a pit generated at a junction part between the second semiconductor layer and a conductive layer in the contact hole grows, the growth of the pit is inhibited by the insulating layer, whereby leakage current caused between the first and second semiconductor layers can be reduced, a reliability of the device being thus enhanced.

Semiconductor device

A MOS type integrated circuit transistor includes: a channel region comprising a monocrystalline epitaxial layer; and a source/drain region of said transistor and a wiring region of a diffusion layer formed of a polycrystalline silicon layer grown on an embedded insulating film.

CMOS type integrated circuit and a method of producing same

A semiconductor device comprises a silicon substrate (1) formed with impurity diffusion layers (5, 9) in a region defined by insulating films (2a, 2b) for separating elements and an aluminum alloy film (11) for electrode interconnection having a contact hole portion 7 whose bottom is electrically in contact with the impurity diffusion layers (5, 9). A titanium silicide (TiSi.sub.2) film (4) is deposited on the surfaces of the impurity diffusion layers (5, 9) to reduce sheet resistivity thereof as well as reduce contact resistance between the same and the aluminum alloy film (11). A molybdenum silicide (MoSi.sub.2) film (8) is further formed thereon to prevent the TiSi.sub.2 film (4) from corrosion in removal of an oxide film through etching, while a titanium nitride (TiN) film (10) is formed thereon to prevent thermal reaction of the aluminum alloy film (11) and the MoSi.sub.2 film (8).

Semiconductor device having a metal electrode interconnection film with

A silicon oxide film and a BPSG film are formed on a silicon substrate to serve as insulating films, and a contact hole is selectively formed in the insulating films. An impurity diffusion layer is formed on the surface layer of the semiconductor substrate at the bottom portion of the contact hole. A second metal film serving as a metal electrode is formed to cover the BPSG film and the impurity diffusion layer, and a first metal film serving as a barrier layer is formed between the second metal film and the BPSG film and impurity diffusion layer. The first metal film prevents boron contained in the BPSG film from being diffused in the second metal film, thereby to prevent precipitation of silicon in the contact hole.

A photomask material according to the present invention comprises a transparent substrate and a silicide film of a transition metal formed on the transparent substrate.

Photomask material

Conductive layers (5a, 9a) included in a multi-layer structure (30a) are electrically interconnected through a conductive connection wall (13a) provided in a contact hole (12) and contacting the side surface (22) of the multi-layer structure (30a). The upper conductive layer (11a) existing on the multi-layer structure (30a) and the lower conductive layer (3) exisitng under the multi-layer structure (30a) are electrically interconnected through a conductive film (11b) provided in the contact hole (12). These two interconnections are insulated from each other by an insulating film (18) provided on the connection wall (13a).

Interconnection structure in semiconductor device and manufacturing

A gate electrode (4') of a MOS transistor is formed in a depression (16) provided in a substrate (1). Source and drain regions (6 and 7) of the MOS transistor are formed in the substrate (1) to be opposed to each other with the gate electrode (4') being located therebetween.

MOS transistor

A semiconductor device and a method of manufacturing the same which comprises a semiconductor substrate and a conductive region formed thereon in multilayer structure of a film of refractory metal or refractory metal silicide inferior in corrosion resistance against a solution containing hydrofluoric acid and a film of refractory metal silicide excellent in corrosion resistance against the solution containing hydrofluorine acid and low electric resistance formed on the same.

Growing community of inventors

Itami, Japan

Tatsuo Okamoto