Other

Kumamoto University

Tohoko University

Tatsuo Morimoto

Tadahiro Ohmi

Tadashi Shibata

Shigetoshi Sugawa

Akira Nakada

Toru Koizumi

Tetsunobu Kochi

Katsuhito Sakurai

Isamu Ueno

Katsuhisa Ogawa

Ryu Kaiwara

Masahiro Konda

Yoshiyuki Taniguchi

Masae Nakada, Legal Representative

Takahiro Nakayama

Akira Nataka

To provide a data generating method, device, and program that can generate drawing data for drawing the entire general design graphic data with an accuracy of about 1 to 4 nm in a drawing method or a drawing system adapted to draw gradation-controllable spotlights in a two-dimensional array. The data generating method is a method for generating, in an exposure system having a function of irradiating multigradation-controllable spotlights in a two-dimensional array onto a photosensitive film on a substrate, gradation values of the spotlights based on design graphic data. Using reference data classified by features of a graphic and describing in advance combinations of gradation values mapped to coordinate information of a graphic, the method discriminates the feature in the design graphic data near positions of the spotlights and selects the combination of the gradation values in the reference data corresponding to coordinate information of the positions of the spotlights, thereby determining the gradation values.

Data generating method, data generating device, and program in an exposure system for irradiating multigradation-controllable spotlights

Configuration management information having circuit configuration information for altering a circuit configuration of an FPGA () is stored in a memory (), the configuration management information according to information related to an instruction group, which is supplied by a configuration management unit () from the outside via a signal line group (), is read from the memory (), and the circuit configuration of the FPGA () is altered according to the read configuration management information to execute processing of the instruction group so that information processing by software is replaced by information processing by hardware in real time, which increases execution speed of information processing and shortens verification time of software, enabling software development in a shorter period and with higher efficiency.

System for managing circuitry of variable function information processing circuit and method for managing circuitry of variable function information processing circuit

An image signal processing method and system, which can greatly reduce the data size upon transmitting an image signal or storing the signal in a storage medium, and can obtain a high-quality image by preventing image quality after color processing from deteriorating. According to the method for processing an image signal output from an image sensing element, a compression step of compressing the image signal and an expansion step of expanding the compressed image signal are executed without executing color processing for executing at least white balance correction or correction, and the color processing is executed after completion of the compression and expansion steps, thereby preventing occurrence of block noise and high-frequency noise associated with compressing/expanding image data after the color processing of the image signal.

Image signal processing method, image signal processing system, storage medium, and image sensing apparatus

Semiconductor arithmetic circuit

A semiconductor device capable of executing size comparison operations on a plurality of data at high speed and in real time and using simple circuitry. An inverter circuit group is used containing a plurality of inverter circuits constructed using neuron MOS transistors. Predetermined signal voltages are applied from the exterior to the first input gates of the inverter circuits, and the output signals of all inverters contained in the inverter circuit group are inputted into a first logical arithmetic circuit and a second logical arithmetic circuit, and the output signal of the first logical arithmetic circuit is inputted into a third logical arithmetic circuit controlled by the output signal of the second logical arithmetic circuit, and the output of the third logical arithmetic circuit is fed back to the second input gates of the inverter circuits contained in the inverter circuit group. Bye use of the output signals of the inverter circuit groups, the position having the maximum voltage among the signal voltages inputted into the inverter circuit groups is specified.

Semiconductor arithmetic circuit and data processing device

The real time compression of moving images employing vector quantization is realized using simple hardware and with an optimal compression ratio with respect to the communication line capacity employed. In the operating system, which is provided with a first mechanism (202), comprising a plurality of groups of numerical values, a second mechanism (201), a first circuit (206), a second circuit (206), and a third circuit (210), the second circuit comprises a plurality of fourth circuits divided into two or more groups (210-213, 219, and 301), the fourth circuits have a plurality of input terminals and at least one output terminal, and a mechanism is provided having a structure wherein various signals expressing degrees of similarity are inputted into the plurality of input terminals, only that signal having the largest degree of similarity among the variety of signals expressing degrees of similarity which are inputted is outputted from the output terminal, and the output signal of a predetermined first group among the two or more groups is inputted into an input terminal of a second group, whereby only one first vector having the largest degree of similarity is selected.

Semiconductor arithmetic apparatus

This invention relates to a method and apparatus for simultaneously driving a plurality of drain boards, radially aligned about a common center, to stabilize and improve terrestrial and submarine foundation soils and submarine soils. This method, using standard width drain boards, can cover a wide absorption and drain area with a relatively small number of drain board driving operations.

Method and apparatus for driving drain board

Growing community of inventors

Miyagi, Japan

Tatsuo Morimoto