Toshiba Memory Corporation

Tatsuo Ishida

Hiroshi Kanno

Tomonari Shioda

Hironobu Hamanaka

According to one embodiment, the substrate includes a plurality of protrusions having columnar configurations, and a void being formed below the protrusions. The stacked body is provided on the substrate. The stacked body includes a plurality of electrode layers stacked with an insulator interposed. The semiconductor body contacts the protrusion and extends through the stacked body in a stacking direction of the stacked body. Upper ends of the protrusions are positioned at a height between a lowermost electrode layer and an electrode layer of a second layer from a bottom of the electrode layers.

Semiconductor device and method for manufacturing same

A semiconductor memory device includes a conductive layer on a source side; a first electrode layer provided on the conductive layer; a second electrode layer provided between the conductive layer and the first electrode layer; a semiconductor layer extending through the first electrode in a first direction from the conductive layer to the first electrode layer; a first semiconductor body provided between the conductive layer and the semiconductor layer, the first semiconductor body including first impurities; and a second semiconductor body provided between the conductive layer and the first semiconductor body, the second semiconductor body including second impurities with a higher concentration than a concentration of the first impurities in the first semiconductor body. A diffusion coefficient of the second impurities in the second semiconductor body is smaller than a diffusion coefficient of the second impurities in the first semiconductor body.

Growing community of inventors

Kuwana, Japan

Tatsuo Ishida