Matsushita Electric Industrial Co., Ltd.

Matsushita Electronics Corporation

Panasonic Corporation

Trio Kabushiki Kaisha

Matshushita Electric Industrial Co., Ltd.

Tatsumi Sumi

Hiroshige Hirano

George Nakane

Nobuyuki Moriwaki

Tetsuji Nakakuma

Toshio Mukunoki

Kouji Asari

Naomi Miyake

Joji Nakane

Atsuo Inoue

Yoshihisa Nagano

Makoto Kojima

Takashi Taniguchi

Yukihiko Miyamoto

Atsushi Ogawa

Shiro Mizutani

Taketoshi Matsuura

Eiichi Sadayuki

Hiroaki Asada

Michiharu Shikata

Mitsuyoshi Ohya

Yasushi Kannan

The present invention is applicable to various sensor outputs including pulse signals and reduces cost for detecting malfunction. The malfunction detection system detects a malfunction in a sensor, and the malfunction detection system includes a sensor including a first terminal, and which outputs a sensor output current that varies a voltage level of the first terminal, a current output unit which varies the voltage level of the first terminal by outputting a constant current for judging to the sensor via the first terminal, and a judging unit which judges that the sensor is malfunctioning when the current for judging causes the voltage level of the first terminal to be equal to or higher than a threshold in a period different from a first period where the sensor output current causes the voltage level of the first terminal to be equal to or higher than the threshold.

Malfunction detection system and integrated circuit

The present invention extends the reading range between a contactless type information medium (semiconductor integrated circuit) and a reader/writer, which exchanges data in contactless communications with the contactless type information medium, and enables a stable data exchange even if the power supply voltage is lowered when data is returned from the contactless type information medium to the reader/writer. Specifically, when data is returned from the contactless type information medium, the data to be returned is held in the logic circuit sectioncapable of operating at a lower voltage than the non-volatile memory circuit section, and the reset detection lower limit voltage to be used by the reset generating circuitduring the data-returning period is set to be lower than that during periods other than the data-returning period.

Semiconductor integrated circuit and noncontact information system including it

A semiconductor integrated circuit includes a supply voltage generator for rectifying a signal received by an antenna coil and generating a supply voltage set at a predetermined voltage by a regulator, and a demodulator. The demodulator includes a demodulation circuit for demodulating an input signal and outputting the demodulated input signal, a resistor whose one end is connected to one end of the antenna coil, a diode whose anode is connected to the other end of the resistor and whose cathode is connected to a node located to the input end of the demodulation circuit, a first capacitance connected between a node at which the resistor and the diode are connected to each other and a grounding conductor, and a second capacitance connected between a node at which the diode and the demodulation circuit are connected to each other and a grounding conductor.

Semiconductor integrated circuit and noncontact information medium

In an IC card applicable to a plurality of data transfer methods and including a plurality of OSs, when power sufficient for the operation is supplied to the IC card, an initial OS selecting section activates one of the plural OSs as an initial OS on the basis of identification information stored in a nonvolatile memory. A transfer method determining section determines a data transfer method on the basis of data received from a reader/writer. An OS applicability determining section determines whether or not the determined data transfer method accords with a data transfer method corresponding to the currently employed OS. When the data transfer methods do not accord with each other, an OS switching section switches the currently employed OS to another OS.

IC card and OS activation method for the same

In a contactless IC card that performs envelope detection on an ASK-modulated carrier wave and demodulates the carrier wave to recover data piggybacked thereon, demodulation is suspended during periods where there is no possibility of a change of a data value (from data 0 to data 1, or from data 1 to data 0) in the digital data piggybacked on the carrier wave. In so doing, incorrect data recovery can be prevented even when noise arises in power supply voltage waveform due to power consumption of an internal memory or the like.

Contactless IC card for preventing incorrect data recovery in demodulation of an amplitude-modulated carrier wave

The present invention comprises a first MOS transistor whose gate and drain are connected with a first node, a second MOS transistor whose gate and drain are connected with the first node and a third node, respectively, a first resistive element which is connected between the first node and a second node, a second resistive element which is connected between the second node and a ground voltage terminal, a first NOT circuit whose input terminal is connected with the second node, whose output terminal is a fourth node, and which is connected between the third node and the ground voltage terminal, and a second NOT circuit whose input terminal is connected with the fourth node and whose output terminal is a fifth node. Consequently, the present invention can detect voltage in a stable condition with low power consumption.

Voltage detection circuit, power-on/off reset circuit, and semiconductor device

A semiconductor integrated circuit is provided to allow a stable operation even in a short distance where an IC card is in contact with a reader/writer. In a semiconductor integrated circuit for a noncontact IC card that obtains driving power supply by carrying superimposed data, obtained voltage does not become overvoltage and data can be demodulated with stability regardless of a change in communication distance. Inputs of a system (including a rectifier circuit and a power supply circuit) producing power supply from an antenna coil of the IC card which receives radio waves transmitted from a reader/writer, and of a demodulator circuit are connected via a path separated from the output of the rectifier circuit. Thus, a power supply voltage range can be set within a permissible value and a rate of change in input of the demodulator circuit can be obtained regardless whether the communication distance is short or long.

Semiconductor integrated circuit

A semiconductor integrated circuit which obtains a driving power from a carrier onto which data has been piggybacked, the semiconductor integrated circuit being characterized by demodulating data by correctly discriminating it even when the obtained power supply voltage has become overvoltage, and characterized by effectively using the power supplied by the carrier. The semiconductor integrated circuit includes: a two-voltage rectifier circuit as a power source circuit ; a voltage regulator circuit which exercises a control so that a power with a higher voltage (VDDH) used for demodulating data does not exceed a certain voltage value; a resistor ; and a capacitor . With this construction, the voltage input to a regulator circuit as the reference voltage changes in correspondence to the change in voltage VDDH which is caused by the change in amplitude.

Semiconductor integrated circuit, a contactless information medium having the semiconductor integrated circuit, and a method of driving the semiconductor integrated circuit

Voltage detection circuit power-on/off reset circuit and semiconductor device

A reference potential generator is constituted of two signal lines 21 and 22; a charge supplier to supply charge to signal lines 21 and 22; connectors 24a and 24b connecting the charge supplier 23 and two signal lines 21 and 22 in order to supply charge to the two signal lines; and a connector 25 connecting two signal lines 21 and 22 together by the second control signal, and two signal lines are disconnected after the potentials of the two signal lines determined by the supplied charge and each of load capacitances of signal lines are averaged. A semiconductor memory device of the invention incorporating the above reference potential generator generating an exact reference potential, is able to amplify and output the potential difference between the reference potential and the potential of data readout in the bit line, and by this, '1' or '0' of readout data can be precisely determined.

Reference potential generator and a semiconductor memory device having

A reference potential generator is constituted of two signal lines 21 and 22; a charge supplying circuit to supply charge to signal lines 21 and 22; a first connection circiut 24a and 24b connecting the charge supplying circuit 23 and two signal lines 21 and 22 in order to supply charge to the two signal lines; and a second connection circuit 25 connecting two signal lines 21 and 22 together by the second control signal, and two signal lines are disconnected after the potentials of the two signal lines determined by the supplied charge and each of load capacitances of signal lines are averaged. A semiconductor memory device of the invention incorporating the above reference potential generator generating an exact reference potential, is able to amplify and output the potential difference between the reference potential and the potential of data readout in the bit line, and by this, '1' or '0' of readout data can be precisely determined.

In a ferroelectric memory of 1T1C configuration in which a memory cell consists of 1 transistor and 1 capacitor per bit, the capacitance of a dummy memory cell capacitor, i.e., the area occupied by the dummy memory cell capacitor is determined based on the capacitive characteristic of a main memory cell capacitor obtained when the main memory cell capacitor was repeatedly operated with both positive voltage and negative voltage until its capacitive characteristic presented no more change. Moreover, not only the main memory cell capacitor but also the dummy memory cell capacitor are operated with both positive voltage and negative voltage by using a power-source voltage, not a ground voltage, as a voltage for resetting the dummy memory cell capacitor. Consequently, the effect of an imprint on the ferroelectric capacitor is reduced, thereby preventing the malfunction of the ferroelectric memory.

Growing community of inventors

Osaka, Japan

Tatsumi Sumi