Hitachi, Ltd.

Tatsuhiro Aida

Akira Yamagiwa

Takehisa Hayashi

Hiroki Yamashita

Toshiro Takahashi

Toshitsugu Takekuma

Kenichi Ishibashi

Masahito Sonehara

Tsutomu Goto

Atsushi Itoh

Akio Koyama

The power supply-voltage dependency of a current source current is reduced and the power supply voltage is lowered. The invention includes an emitter-coupled logic circuitand a reference-voltage generating circuitfor generating a reference voltage VCSC for controlling a drain current (=current source current ICS) of a constant current-supplying n-type MOS transistorThe emitter-coupled logic circuitcomprises a current switch made up of a pair of emitter-coupled bipolar transistorsanda constant current-supplying n-type MOS transistorthat is connected in series with the current switch, and resistor meansandconnected in series with the bipolar transistorsandindividually for obtaining an output voltage. The reference-voltage generating circuitcomprises an n-type MOS transistora bipolar transistorwhich determines the drain voltage of the n-type MOS transistorand a control circuitfor controlling the drain current of the n-type MOS transistor

Logic circuit

In a simultaneous bidirectional transmission circuit for conducting simultaneous two-way communication between LSIs via a transmission line, an input/output circuit connected to the transmission line is included in an LSI. The input/output circuit has a driver and a receiver. The driver sends out an output signal depending on a logical signal within the LSI to the transmission line. The receiver receives a mixed signal having a mixture of a received signal and the output signal via the transmission line. The signal to be received by the receiver in an LSI has been sent out to the transmission line by the other party i.e., another LSI in communication therewith. The receiver receives the logical signal output as well. The receives derives a difference between the mixed signal and the logical signal output, thereby removing the component of the logical signal from the mixed signal, and outputs the received signal. The receiver has a reference circuit for receiving the logical signal and outputting it to a bias circuit, a bias circuit for generating a divided voltage signal in conjunction with internal resistance of the reference circuit, and a differential receiver for receiving the mixed signal and the divided voltage signal and outputting the difference between them. The reference circuit and the bias circuit are formed by using MOS transistors.

Simultaneous bidirectional transmission circuit

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Hino, Japan

Tatsuhiro Aida