International Business Machines Corporation

Globalfoundries Inc.

Taryn J Davis

Jonathan R Fry

Tuhin Sinha

Vincent James McGahay

Terence Lawrence Kane

Melissa Alyson Smith

Andrew J Martin

Kathryn E Schlichting

Christopher F Klabes

Kamal Kumar Sikka

Chenzhou Lian

Evan G Colgan

Hilton T Toy

Jeffrey Allen Zitz

Kenneth Charles Marston

Paul F Bodenweber

Yi Pan

Marcus E Interrante

Kathryn C Rivera

Flip-chip package reliability monitoring and systems of monitoring using capacitive sensors are disclosed. The monitoring is conducted in situ and in real-time without the need for destructive testing of the packages. The capacitive sensors can be used for flip-chip package reliability monitoring.

Method and structure for flip-chip package reliability monitoring using capacitive sensors groups

A time temperature monitoring system and method for use with a microchip or similar structure. A disclosed system includes: an active region; a dopant source located proximate the active region; an activation system for activating a diffusion of the dopant source into the active region; and a set of electrodes embedded in the active region of the substrate, wherein the electrodes are configured to detect the diffusion in the active region at varying distances from the dopant source to provide time temperature information.

Time temperature monitoring system

A time temperature monitoring system and method for use with a microchip or similar structure. A disclosed system includes: a substrate having an active region; a dopant source located proximate the active region; an activation system for activating a diffusion of the dopant source into the active region; and a set of spatially distributed electrodes embedded in the active region of the substrate, wherein the electrodes are configured to detect the diffusion in the active region at varying distances from the dopant source to provide time temperature information.

A method includes forming a flip-chip module including a chip connected to a substrate with a layer of underfill material adhered to the chip and the substrate; sensing chip-packaging interaction failure in the underfilled flip-chip module in situ; reporting in-situ chip-packaging interaction failure to a device in real-time; and imaging the chip-packaging interaction failure with an indirect scanning acoustic microscope.

Scanning acoustic microscope sensor array for chip-packaging interaction package reliability monitoring

A lidded or lidless flip-chip package includes two or more polygon shaped dies. The polygon dies may be interconnected to a substrate or to an interposer interconnected to a substrate. The interposer may be similarly shaped with respect to the polygon die(s). For the lidless or lidded package, the package may include underfill under the polygon dies surrounding associated interconnects. For the lidded package, the package may also include thermal interface materials, seal bands, and a lid. The polygon die package reduces shear stress between the polygon die/interposer and associated underfill as compared to square or rectangular shaped die/interposer of the same area. The polygon dies further maximize the utilization of a wafer from upon which the polygon dies are fabricated. The multi polygon die package may allow for a significant reduction of the polygon die to polygon die relative to the spacing and may reduce signal interconnect time.

Polygon die packaging

Embodiments of the invention comprise a homogeneous heat spreading cap element in chip packages to facilitate better heat spreading and dissipation. The heat spreading cap comprises a single high-K graphite layer supported by a copper frame for increased stability and reduced thermal warpage during handling and operation while minimizing thermal penalty by reducing the amount of material having a relatively low heat conductivity that is needed in conventional heat spreading caps.

Heat spreading layer with high thermal conductivity

A semiconductor device package which includes a semiconductor package, a semiconductor device joined to the semiconductor package; and a lid to be placed over the semiconductor device and joined to the semiconductor package. The lid includes: a block of a first material having a first surface and a second surface, the second surface facing the semiconductor device, the block having perforations extending between the first surface and the second surface; inserts for filling the perforations, each of the inserts being made of a second material, at least one of the inserts protrudes beyond the second surface towards the semiconductor device; and a bonding material to bond the inserts to the block so that the at least one of the inserts protrudes beyond the second surface towards the semiconductor device. Also included is a method of assembling a semiconductor device package.

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Beacon, NY, United States of America

Taryn J Davis