Infineon Technologies Ag

Lantiq Beteiligungs Gmbh & Co. Kg

Taro Kamiko

Yao Chye Lee

Ganesha Nayak

Jin Sze Sow

Charles Bry

Raimar Thudt

Pramod Pandey

Matthias Heink

Franz-Josef Schafer

There is provided a method for updating an internal memory on a semiconductor device from an external memory. The external memory is arranged in a plurality of data portions. The method comprises the steps of writing a first data portion from the external memory to the internal memory, processing the first data portion and, while the first data portion is being processed, once a selected data item is processed, starting to write a second data portion from the external memory to the internal memory. The method may be applied to the processing of software by an embedded processor on a semiconductor device. There is also provided a semiconductor device and a hardware module for the semiconductor device.

Memory updating in a dual-ported internal memory with concurrent transfer and retrieval

Operating a dual-ported internal memory

In a method for classifying data packet units, each comprising a group of data packet parameters which comprises a plurality of data packet parameters, a subgroup of data packet parameters for configuring a classification key is selected, the data packet units are divided into data packet classes on the basis of the classification key and a selected classification algorithm, and the data packet units are allocated to further data packet parameters which correspond to the respective data packet class.

Method and processor for classifying data packet units

A CPUhaving a processorand an internal data cacheIS operated in combination with a dummy interfacewhich simulates the existence of an external memoryhaving the same address space as the cache memorybut which does not store data written to it. In this way, a conventional CPU can be operated without read/write access to an external memory in respect of at least part of its memory address space, and therefore with a higher performance resulting from faster memory access and reduced external memory requirements. The CPUmay be one of a set of CPU chipsin a data processing system, one or more of those chipsoptionally having read/write access to an external memory

Methods for operating a CPU having an internal data cache

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Singapore, Singapore

Taro Kamiko