Aisin Seiki Kabushiki Kaisha

Imra Europe S.a.s.

Tarik Aouine

Frederic Coutant

Yuichi Murakami

Tomohiro Yamamoto

Kazunori Ono

Akira Furuhashi

Takahiro Horie

Michel Gaeta

Luc Haumonte

Abderrahman Essebbar

Yuichi Murukami

A frequency shift keying digital signal receiving apparatus includes a detecting portion detecting a new signal on the basis of a signal, from which a correlated ambient noise is filtered out by an adaptive filter, a holding portion holding a first electric power for the signal received before a new signal is detected, a calculating portion calculating a second electric power for the signal received after the new signal is detected, a comparing portion comparing levels of the first and second electric powers, a selector selecting the signal, from which the correlated ambient noise is filtered out, when the first electric power is higher than the second electric power and selecting the signal bypassing the adaptive filter when the first electric power is lower than the second electric power, and a demodulating portion demodulating a desired signal on the basis of the signal selected by the selecting portion.

Frequency shift keying (FSK) digital signal receiving apparatus

A digital signal receiving apparatus includes: detection-judging portion judging a possible presence of a desired signal when a signal level of a smoothed signal is greater than a reference level; wherein said first smoothed signal and said second smoothed signal are compared in order to generate a detection signal representing a judgment of a possible presence of a desired signal, said second smoothed signal having a convergence speed slower than that of the first smoothing filter, a filter controlling portion switching an adaptive filter from an adaptive mode to a non-adaptive mode when the detection-judging portion judges the possible presence of the desired signal and switching from the non-adaptive mode to the adaptive mode when the detection-judging portion judges the absence of the desired signal; a limiting portion limiting a signal level of an auto-correlation signal to the signal level of the smoothed signal; and a demodulating portion demodulating the auto-correlation signal having the signal level limited by the limiting means so as to generate a demodulated signal, wherein the input to the demodulator is limited to the level of a smoothed signal, said smoothed signal being generated from the input of the detection judging portion.

Digital signal receiving apparatus

A digital signal receiving apparatus includes a detection-judging portion having a first smoothing filter generating a first smoothed signal by smoothing an auto-correlation signal and judging a possible presence of a desired signal when a signal level of the first smoothed signal is greater than a reference level and an absence of the desired signal when being smaller than the reference level. The smoothing filter includes a limiting portion limiting a fluctuation width of the first smoothed signal; and an adjusting portion configured to adjust the fluctuation width of the first smoothed signal limited by the limiting portion to be reduced while an elapsing time after the detection-judging means judges the possible presence of the desired signal is increasing.

A circuit and method for suppressing interference components in a received signal are provided. The circuit includes an adaptive filter configured to process a first quantity of digital signal samples per unit time when the adaptive filter is operating in a first mode, and a second quantity of digital signal samples per unit time when operating in a second mode, wherein the first quantity is less than the second quantity. The method includes implementing an adaptive filter configured to operate in an adaptive mode and in a second mode having a reduced adaptability compared to the adaptive mode; operating the adaptive filter in the adaptive mode to process a first quantity of digital signal samples per unit time; and operating the adaptive filter in the second mode to process a second quantity of digital signal samples per unit time; wherein the first quantity is less than the second quantity.

Circuit and method for suppressing interference components in received signal

A demodulation circuit and method are provided. The demodulation circuit includes a transformation circuit which is configured to transform the received signal into a modified signal representation in which both amplitude-varying information and frequency-varying information are converted to a uniform representation; and a processing circuit which is configured to process the modified signal representation to demodulate the received signal based on the uniform representation. The method includes transforming the signal into a modified signal representation in which both amplitude-varying information and frequency-varying information are converted to a uniform representation; and processing the modified signal representation to demodulate the signal based on the uniform representation.

Growing community of inventors

Valbonne, France

Tarik Aouine